<!-- PFC_SKM_INTERCONNECT_THDI_PARITY_FIX_20261005:
- Fixes SKM HI_WAVE compatibility mode consistency after project import: angleMethod, linearLoadModel and resistanceModel now retain explicit defaults when older/saved project settings omit them.
- harmonicSKMHiWaveCompatible() now uses the same default ("SKM HI_WAVE Compatible") as the harmonic source-angle resolver, preventing a split state where source phasors used SKM convention while feeder/source/passive-load impedance used the non-SKM path.
- In SKM HI_WAVE Compatible mode, passive non-harmonic load equivalents use nominal-voltage kVA/PF R+jX basis so repeated identical switchboard sections do not acquire artificial harmonic-absorption changes solely from LF voltage drop.
- In SKM HI_WAVE Compatible mode, passive non-motor load resistance remains R1 and reactance scales with harmonic order (R+j*hX). Non-SKM modes retain the selectable PowerFlowCheck frequency-dependent resistance/reactance models.
- Nonlinear harmonic current-source magnitudes remain based on the authoritative solved LF input current; this preserves the previously validated ~21.5% individual nonlinear feeder THDi behavior.
- Adds SKM interconnect parity regression checks for default-mode consistency, LF-current source scaling, passive-load operating-voltage invariance, constant-R and hX scaling.
-->
<!-- PFC_SKM_HIWAVE_IMPEDANCE_PARITY_FIX_20261004:
- In SKM HI_WAVE Compatible mode, cable/feeder and utility harmonic impedance now follows SKM HI_WAVE's documented linear-from-base rule: Z(h)=R1+j*h*X1 (sequence-appropriate R/X), so resistance stays at the entered/library base value while reactance scales with harmonic order.
- Non-SKM modes retain the selectable PowerFlowCheck resistance model (including Sqrt h).
- Transformer/generator harmonic resistance behavior is not changed by this cable/utility parity correction.
- Together with the 20261004 current-angle correction, this resolves the supplied FDR-42-OFF benchmark mismatch in source/main-feeder THDi and bus THDv without forcing result values.
-->
<!-- PFC_SKM_HIWAVE_UPSTREAM_PHASOR_AGGREGATION_FIX_20261004:
- Corrects SKM HI_WAVE Compatible upstream harmonic phasor aggregation.
- Uses theta_h = theta_profile + h*(theta_I1,solved - theta_I1,library) for ordinary nonlinear current sources.
- Restores order-dependent cancellation/reinforcement between same-spectrum loads having different displacement PF.
- Targets the supplied FDR-42-OFF benchmark where SKM reports ~11.81% source/main-feeder THDi and ~0.9% main-bus THDv.
- Does not alter LF equations, harmonic magnitudes, conductor/source harmonic impedance models, or AHF absolute command-angle handling.
-->
<!-- PFC_SKM_HARMONIC_PHASOR_BACKBONE_CORRECTION_20261003 — SUPERSEDED 20261004:
- The 20261003 "apply solved I1 angle once" convention was retained only as historical release trace.
- PFC_SKM_HIWAVE_UPSTREAM_PHASOR_AGGREGATION_FIX_20261004 below is authoritative.
- Current SKM HI_WAVE Compatible formula: theta_h = theta_profile + h*(theta_I1,solved - theta_I1,library).
- This restores order-dependent cancellation/reinforcement between nonlinear sources with different displacement PF.
- Feeder THDi remains calculated from exact solved harmonic branch phasors divided by that feeder's authoritative LF I1; no THDi target is forced.
- Balanced H and UH share the corrected helper. LF equations are unchanged.
-->
<!-- PFC_SKM_LINEAR_LOAD_HARMONIC_IMPEDANCE_FIX_20261003:
SKM HI_WAVE parity correction for radial harmonic backbone behavior.
- Corrects passive linear-load harmonic impedance: the global feeder/conductor sqrt(h) AC-resistance correction is no longer applied to the load's equivalent resistive component.
- Passive load R remains the solved fundamental equivalent resistance; inductive X continues to scale with harmonic frequency/order.
- Feeder/cable harmonic resistance continues to use the selected conductor resistance model, including sqrt(h) where configured.
- Nonlinear equipment with an assigned harmonic current-source profile remains excluded from the passive Series-RL shunt to avoid double modeling.
- Feeder harmonic currents remain the exact branch currents recovered from the harmonic network; no THDi percentage is forced or normalized.
- This correction improves SKM-style linear-load harmonic absorption and prevents artificial upstream THDi drift in repeated radial switchboard sections.
- Load Flow equations and fundamental results are unchanged.
-->
<!-- PFC_SKM_HARMONIC_SOLVED_LF_CURRENT_AND_BUS_PHASOR_FIX_20261003:
- Harmonic spectra now use the fresh solved LF input current of each nonlinear load/motor as I1 whenever an authoritative physical feeder record exists.
- Constant-power motor harmonic injection therefore scales with the actual operating current as bus voltage falls, matching SKM/HI_WAVE behavior seen in the benchmark.
- Bus harmonic currents continue to be reconciled order-by-order as complex phasors (I5, I7, I11, ...), preserving cancellation/reinforcement before RMS/THDi is calculated.
- No THDi percentages or harmonic RMS magnitudes are arithmetically summed at buses.
- LF equations and harmonic network impedance equations are unchanged.
-->
<!-- PFC_SKM_HIWAVE_HARMONIC_PHASOR_PARITY_FIX_20261003 — SUPERSEDED 20261004:
The 20261003 local-voltage-frame convention is retained only as historical trace.
The current SKM HI_WAVE Compatible convention is current-waveform referenced:
  theta_h,network = theta_h,profile + h * (theta_I1,solved - theta_I1,library).
This preserves harmonic-order-dependent cancellation/reinforcement among same-profile loads with different displacement PF while carrying transformer/network displacement through the solved I1 phasor.
Balanced H and independent UH use the same corrected phasor convention. Solver Y-matrix, harmonic magnitudes, feeder/source impedance models, and LF equations are unchanged.
-->
<!-- PFC_MOTOR_ELECTRICAL_INPUT_CANONICALIZATION_20261003:
Hardens motor steady-state power handling so every study uses one canonical electrical-input basis.
- Rated motor kW remains mechanical shaft output for HP/kW input methods.
- Full-load electricalInputKW is derived explicitly as shaft kW / efficiency (or directly from kVA x PF / current x voltage x PF).
- pfcSyncMotorElectricalQuantities persists electricalInputKW as a derived compatibility field.
- staticMotorKWKvar now consumes the canonical derived electrical-input value directly, preventing any path from ambiguously treating shaft kW as electrical load or applying efficiency twice.
- Operating loading is applied after the full-load electrical-input derivation.
- LF/ULF/Newton-Raphson network equations are unchanged; this is input-model consistency hardening.
-->
<!-- PFC_MASTER_RUNTIME_SCOPE_FIX_20261003:
Repairs Master-edition QuickCalc runtime scope failures caused by post-main enhancement scripts referencing NEC
ampacity tables and sizing helpers that remained inside the main PowerFlowCheck private IIFE. A controlled late
runtime bridge exports only the required QuickCalc data/helpers. Conductor Sizing 9.5 also validates its prior
pfcESRead reader before wrapping it. All Master engineering modules and solver equations remain enabled and unchanged.
-->
<!-- PFC_REQUEST_EDITION_QUICKCALC_LABEL_SYNC_20261003:
User-facing Request/RFI edition cards, edition feature-display labels, and ribbon customization text now use
"QuickCalc" instead of "Electrical Sizing". Internal electricalSizingBtn IDs and calculation/stripping identifiers
remain unchanged to preserve edition gating and engineering behavior.
-->
<!-- PFC_EDITION_QUICKCALC_SYNC_20261003: PowerFlowCheck Master rebased to current Master QuickCalc; prior edition gate and physical stripping reapplied. -->
<!-- PFC_H_UH_RESULTS_2DP_20261001:
Balanced Harmonics and Unbalanced Harmonics user-facing result values use 2 decimal places to match Load Flow presentation.
Display formatting only; H/UH solver equations and stored numerical results are unchanged.
-->
<!-- PFC_LIGHTNING_HOSTED_EQUIPMENT_GRAPH_FIX_20261001:
Lightning topology coverage hardening. Generic in-service isConnection links now become zero-delay, unity-transfer INTERNAL transient graph links so equipment attached through automatic/hosted buses receives Lightning results. Internal links are excluded from surge-impedance/reflection loading. SPD/LA remain shunts. Transformer terminal connections remain handled only by the dedicated transformer transfer model. Adds hosted-equipment propagation regression coverage. -->
<!-- PFC_LIGHTNING_VALIDATION_SYNC_FIX_20260930:
Synchronizes Lightning regression tests with the current nonlinear local-surge solver.
- Removes stale references to localPeakKA/localDidtKAperUs from ltgLocalSurgeContext().
- Cascade and VPR sensitivity tests now exercise ltgSolveProtectorOperatingPoint(), the same path used by production Lightning analysis.
- Does not change the engineering solver itself.
-->
<!-- PFC_IEEE_ARRESTER_RUNTIME_COMPATIBILITY_FIX_20260930:
Repairs Lightning initialization/runtime regressions introduced by the IEEE-informed arrester coordination upgrade.
- Restores the original ltgSPDDesignRecord compatibility contract used by validation and sizing UI.
- Fixes undefined maxKA reference.
- Preserves new residual/lead/protected/BIL margin fields.
- Preserves LA/SPD nonlinear local operating-point and cascade logic.
-->
<!-- PFC_IEEE_INFORMED_ARRESTER_COORDINATION_20260930:
IEEE-informed surge arrester coordination upgrade.
References implemented as engineering guidance, not a claim of formal standards certification:
- IEEE C62.11 metal-oxide arrester concepts: MCOV, discharge current, discharge voltage, TOV.
- IEEE C62.22 application concepts: arrester application / insulation coordination.
- IEEE C62.22.1 connection-effects concept: installation connection voltage contributes to total impressed transient voltage.
Enhancements:
- Multi-point arrester residual-voltage curve fields at 1.5, 3, 5, 10, 20 kA.
- Transparent result decomposition: residual voltage, lead Ldi/dt voltage, protected crest.
- BIL / withstand protective margin in kV and percent.
- PASS / REVIEW indication for positive/negative protective margin.
- Cascaded LA/SPD stages continue to solve local nonlinear operating point.
-->
<!-- PFC_LA_SELF_CONSISTENT_CLAMP_FIX_20260930:
Lightning arrester / SPD nonlinear shunt correction.
- MV LA calculations ignore legacy LV SPD protectionLevelKV / nominalDischargeKA / maxDischargeKA fallbacks.
- LA voltage is based only on manufacturer V-I data or entered arrester residual-voltage data.
- Each SPD/LA local operating point is solved self-consistently from:
      Vincident = Vdevice(I) + Vlead(I,dI/dt) + I*Zlocal
- Local dI/dt is scaled to the solved local diverted current.
- The corrected solver is used at every cascaded protection stage and voltage level.
- Existing non-lightning engines are unchanged.
-->
<!-- PFC_CASCADED_LOCAL_SURGE_RUNTIME_SCOPE_FIX_20260930:
Fixes runtime ReferenceError in Lightning result publication caused by an out-of-scope 'lc' variable.
Main object results now read local di/dt from the applied SPD/LA clamp record when present,
otherwise fall back to the event waveform di/dt. Attached protector result publication uses its
own in-scope local surge context. Cascade solver behavior is otherwise unchanged.
-->
<!-- PFC_CASCADED_LOCAL_SURGE_CONTEXT_FIX_20260930:
Cascaded SPD / LA transient coordination hardening.
Each protector now uses LOCAL surge conditions at its own protected node:
- local incident surge voltage after all upstream clamps / transformer / branch attenuation,
- local surge impedance,
- local diverted protector current,
- local current rise rate scaled from the propagated local current rather than the original source lightning current.
This applies repeatedly to SPD or LA devices at any voltage level.
The protected node voltage is clamped before onward propagation.
Existing LF/ULF/SC/H/UH/DC calculation engines are unchanged.
-->
<!-- PFC_SPD_BUS_RESULT_OWNERSHIP_AND_XF_ALIAS_FIX_20260930:
Project-specific Lightning hardening after exported transformer2w/transformer3w audit.
- Lightning equipment transfer recognizes transformer, transformer2w and transformer3w.
- Transformer transient terminal mapping accepts exported normal terminal feeders, not only isConnection links.
- Final shunt-protector ownership pass clamps the protected bus state before objectMap/result rendering.
- Adds imported-transformer + downstream-SPD regression.
-->
<!-- PFC_SPD_LA_ANY_CONNECTION_SHUNT_CASCADE_FIX_20260930:
SPD/LA topology hardening for cascaded protection.
- Any feeder/connection terminating at an SPD or LA is treated as the protector's shunt attachment to the opposite electrical node.
- The protector connection is not treated as a series surge-propagation branch; its actual phase/ground lead lengths remain modeled by the SPD/LA property fields.
- This makes LV SPD clamping work whether the user connected it with Direct Connection or a normal feeder/cable.
- Upstream LA -> transformer -> downstream SPD cascades clamp sequentially at their respective buses.
- Adds dedicated two-stage cascade regression.
-->
<!-- PFC_SPD_LA_CONNECTED_BUS_CLAMP_FIX_20260930:
SPD/LA direct connections are treated as shunt protectors on their connected electrical node.
Connected bus Vpeak becomes the post-clamp crest voltage; incident voltage is retained separately.
SPD/LA result records are published from the protected node. LF/ULF/SC/H/UH/DC solver equations are unchanged.
-->
<!-- PFC_SEPARATE_SPD_LA_SIMPLIFIED_PROPERTIES_20260930:
Separates LV SPD and MV Lightning/Surge Arrester into independent one-line equipment types.
Palette icons use the lightning symbol with SPD or LA labels for quick visual recognition.
One-line symbols remain grounded shunt protection symbols appropriate to each device class.
Properties are simplified to normal field/nameplate entries with less-common data under Advanced.
Both elements share the existing Lightning surge-clamping core. Legacy type='spd' projects remain compatible.
Existing LF/ULF/SC/H/UH/DC solver equations are unchanged.
-->
<!-- PFC_SPD_LA_FIELD_MODEL_20260930:
Realistic field-style surge protection model.
- One SPD/LA object supports two explicit classes: LV Surge Protective Device and MV Metal-Oxide Surge Arrester.
- LV data follows common UL 1449 field/nameplate workflow: SPD Type, system/configuration, protection mode, MCOV, VPR by mode, In, Imax, SCCR, optional Iimp, TOV, lead geometry/inductance and manufacturer V-I data.
- MV data follows common IEEE C62.11 / manufacturer arrester workflow: arrester class, rated voltage, MCOV, system grounding, nominal discharge/classifying current, residual-voltage curve points, front-of-wave protective level, TOV capability, energy capability, high-current withstand, lead geometry and protected-equipment BIL/withstand.
- Lightning clamping uses manufacturer V-I data when supplied, field residual points for MV arresters when supplied, and a clearly identified screening curve only as fallback.
- Existing saved SPD projects remain backward compatible. Existing LF/ULF/SC/H/UH/DC solver equations are unchanged.
-->
<!-- PFC_LIGHTNING_ENGLISH_UNITS_20260928: Lightning/Surge user-facing length units standardized to U.S. customary units. Nearby-strike distance/exposure and SPD lead lengths are entered/displayed in feet; ductbank report geometry is displayed in inches/feet; soil resistivity is displayed in ohm-ft. Internal transient calculations remain SI with explicit conversions, preserving existing solver equations and saved-project compatibility. -->
<!-- PFC_ELECTRICAL_SIZING_PHASE_S2A_ACCURACY_HARDENING_20260927: Equipment wire recommendations now use the embedded NEC ampacity engine (material-specific Table 310.16 values, insulation temperature, ambient correction, CCC adjustment, termination cap); parallel conductor recommendations are restricted to 1/0 AWG and larger; 10 A standard OCPD added; small-conductor OCPD screening and conservative next-size review added; motor operating/VD current separated from NEC table FLC. -->
<!-- PFC_ELECTRICAL_SIZING_PHASE_S2_OCPD_EGC_20260927: Adds active OCPD and base NEC Table 250.122 EGC sizing paths where sufficiently defined; special equipment remains planned/gray.
<!-- PFC_NEC_AMPACITY_TAB_SWITCH_FIX_20260927: Repairs final active Electrical Sizing popup tab handlers; isolates NEC Ampacity listeners from Equipment Sizing listeners. -->
<!-- PFC_ELECTRICAL_SIZING_CONTEXT_INPUTS_NEC_MOTOR_TABLE_20260927: Context-sensitive Electrical Sizing inputs; Motor/Fire Pump HP-only quantity input with built-in NEC FLC lookup by voltage/phase; Transformer kVA-only quantity input. Unsupported motor table combinations return DATA REQUIRED. -->
<!-- PFC_ELECTRICAL_SIZING_CALCULATOR_20260927: Adds Calculator-ribbon Electrical Sizing popup for Motor/VFD/Transformer/Capacitor/Passive Filter/AHF/UPS/Generator/General Load/Heater/EV/HVAC/Welder/Fire Pump/Custom. Calculates operating amps, code/design amps, suggested Cu/Al conductor and parallel sets from embedded 75C ampacity/library data, plus automatic AC voltage-drop screening; supports Apply to Selected Feeder with user confirmation. Load Flow solvers unchanged. -->
<!-- PFC_ALL_MODULE_DRAG_RESULT_PERSISTENCE_AUDIT_20260927: All study result lanes preserve solved datablocks during pure geometry drag and force immediate + RAF redraw on release. Includes LF/ULF/SC/H/UH/DC/REL/MS/GEN/Grounding/Conduit/Cost/Lightning/Equipment Evaluation. Pure geometry invalidation guard added; topology-changing loose-end reconnect still invalidates. -->
<!-- PFC_GEOMETRY_DRAG_RESULT_PERSISTENCE_FIX_20260927: Pure canvas geometry moves no longer invalidate solved study results; datablocks remain visible during/after drag and receive an immediate + animation-frame redraw. Electrical topology changes such as loose-end reconnect still invalidate results. -->
<!-- PFC_PHASE2G_FINAL_FULL_REGRESSION_RELEASE_HARDENING_20260926:
Final Phase 2G release-hardening layer for PowerFlowCheck 1.02.
- Adds one consolidated release-readiness gate spanning eight-study engineering validation, DC validation, UH-AHF regression,
  Phase 2A/2B/2D/2E/2F audits, project round-trip integrity, report source freshness, runtime issue state and performance evidence.
- Release status is PASS only when mandatory engineering/integrity checks pass and a large-network benchmark has been run without FAIL.
- If performance evidence has not been run on the target machine, release status is REVIEW rather than falsely PASS.
- Captures frozen hashes of principal solver function bodies for future release-to-release equivalence checks.
- Adds a Final Release Validation button to the Validation center.
Validated electrical solver equations are unchanged.
-->
<!-- PFC_PHASE2F_LARGE_NETWORK_PERFORMANCE_HARDENING_20260926:
Post-validation Phase 2F hardening.
- Adds bounded performance telemetry for network size, study runtime and canvas rendering.
- Adds large-network classification at 150+ buses or 400+ total electrical drawing entities.
- Avoids the Phase 2C confirmation redraw when the immediate large-network render is already expensive; the required immediate render remains.
- Adds 50/100/150/200/300-bus synthetic radial benchmark generation with automatic project-state restore.
- Adds LF/SC large-network benchmark gates and optional extended ULF/H/UH tiers.
- Adds repeated-run memory diagnostics using browser heap data when available.
- Exposes performance diagnostics through window.PFC.Phase2F.
Validated electrical solver equations are unchanged.
-->
<!-- PFC_PHASE2E_REPORT_EXPORT_HARDENING_20260926:
Post-validation Phase 2E hardening.
- Electrical report sections (LF/ULF/SC/H/UH/DC/Lightning) require the same current solved revision used by the one-line ERR display.
- Stale stored results are blocked from engineering reports and identified as RERUN REQUIRED.
- Report dialog distinguishes FRESH / STALE / NOT RUN and Select Studies With Results selects only fresh electrical studies.
- Per-section runtime containment retained and expanded with build diagnostics.
- Common report table builder accepts null/scalar/array/object rows safely.
- Adds report-source parity checks against current ERR revision and report completeness diagnostics.
- Report HTML is verified for structural completeness before Open / Print / Export.
Validated electrical solver equations are unchanged.
-->
<!-- PFC_PHASE2D_PROJECT_FILE_INTEGRITY_20260926:
Post-validation Phase 2D hardening.
- Adds project schema/version diagnostics and import normalization metadata.
- Strengthens pre-commit and post-migration integrity checks.
- Adds canonical save fingerprint + JSON round-trip verification before reporting Save success.
- Verifies unique object/feeder IDs, valid feeder endpoints, finite numeric trees, and serializable payloads.
- Preserves unknown fields by cloning project payloads rather than rebuilding imports from a restricted schema.
- Keeps project Open transactional with rollback to the pre-open state on any failure.
- Adds Phase-2D project/file audit exposed through window.PFC.Phase2D.
Validated electrical solver equations are unchanged.
-->
<!-- PFC_PHASE2C_RENDER_UPDATE_SYNCHRONIZATION_20260926:
Post-validation Phase 2C hardening.
- Fixes the Phase 2B ordering gap where a study could draw before being marked fresh.
- Successful electrical-study completion now marks the result fresh, publishes ERR, then forces an immediate redraw.
- Schedules one requestAnimationFrame confirmation redraw so DOM/canvas state committed in the same event turn is visible without clicking the canvas.
- Adds render-generation guarding so an older delayed completion cannot repaint over a newer active study.
- Adds render diagnostics/audit counters.
Validated electrical solver equations are unchanged.
-->
<!-- PFC_UH_AHF_SIGN_AND_BACKTRACK_FIX_20260926:
Applies the balanced-H AHF network-injection sign convention to Unbalanced Harmonics.
- Removes the extra 180-degree reversal from UH A/B/C harmonic compensation commands.
- Keeps UH compensation independent and phase-domain.
- Adds THDi anti-worsening backtracking and best-command restore to the UH closed-loop controller.
- Adds a UH AHF regression helper requiring controlled-phase THDi to improve or not worsen when AHF is enabled.
No LF/ULF/H/DC solver equations are changed.
-->
<!-- PFC_PHASE2B_RESULT_OWNERSHIP_STALE_ISOLATION_20260926:
Post-validation Phase 2B hardening, integrated inside the native PowerFlowCheck closure.
- Adds native-study solved-revision ownership separate from ERR publication revision.
- Prevents stale native results from being re-published under a newer input revision.
- Invalidates authoritative ERR packs and suppresses stale electrical result layers immediately after input changes.
- Re-publishes a study only after that study actually completes on the current input revision.
- Adds freshness gates to shared object, feeder, text-context, and DC result display paths.
- Adds an internal Phase-2B ownership/freshness audit exposed through window.PFC.Phase2B.
Validated solver equations are unchanged.
-->
<!-- PFC_PHASE2_RUNTIME_SHELL_HARDENING_20260926:
Post-validation Phase 2 hardening. Validated electrical solver function bodies are intentionally unchanged.
- Consolidates duplicate global runtime-error collectors into the existing PFC.Runtime issue buffer.
- Wraps existing ribbon study/project/report handlers after native bindings are complete; one handler failure cannot escape as an uncaught UI exception.
- Promise-returning handlers receive rejection containment.
- Adds Phase-2 readiness audit for critical UI bindings, project transaction/integrity support, report isolation, runtime diagnostics, and validated result pipelines.
- Does not alter LF/ULF/H/UH/MS/Generator/DC solver equations.
-->
<!-- PFC_DC_ENGINEERING_VALIDATION_20260926:
Adds one consolidated DC engineering-validation gate covering:
- DC analytical/IEEE regression suite
- Battery/UPS hand calculations
- UPS battery-mode integration
- Coupled charger/rectifier and DC-DC converter network behavior
- PV/BESS DC/AC inverter analytical and production-network behavior
- Advanced converter/smart-inverter controls
The validation runner does not alter production solver equations.
-->
<!-- PFC_EIGHT_STUDY_VALIDATION_CONTINUED_20260926:
Validation-only corrections after live Chromium execution.
1) LF transformer terminal-bus parity tolerance changed from 1e-9 A to 1e-4 A to reflect floating-point/network-reconstruction precision while remaining far below engineering significance.
2) Auto Size cable/breaker validation reads the authoritative recommendation required-current string (e.g. "132.0 A") rather than a nonexistent designA property.
Production LF/ULF/H/UH/MS/Generator/AutoSize/Equipment-Evaluation calculation equations are unchanged.
-->
<!-- PFC_AHF_DEFAULT_1000A_20260926: Newly placed AHFs default to 1000 A rated output current per unit; imported/saved project ratings remain unchanged. -->
<!-- PFC_AHF_THDI_COMPENSATION_SIGN_AND_BACKTRACK_FIX_20260926: Corrects AHF harmonic network-injection sign convention; AHF positive source command uses sensed physical bus-current angle (ordinary nonlinear loads are already stamped with 180-degree negative injection). Adds connected-bus THDi monotonic backtracking and best-command restore. -->
<!-- PFC_MS_RUNNING_TIME_ACCEPTANCE_20260926: Motor Starting authoritative acceleration time is time-to-RUNNING at configurable running-speed threshold (default 95%); time criterion PASS only when RUNNING is reached within Maximum Start Time. -->
<!-- PFC_EIGHT_STUDY_STEP_VALIDATION_20260926: Ordered PASS/FAIL validation for LF, ULF, H, UH, Motor Starting, Generator Sizing, Auto Size and Equipment Evaluation; includes hand equations, benchmark cases and coverage gates. -->
<!-- PFC_RUNTIME_STABILIZATION_PREVALIDATION_20260926: Runtime-only stabilization pass. Fault-contained top-level ribbon binding, global runtime issue capture, report-section isolation, missing Generator Sizing Loads handler repair, and report-open exception containment. No solver equations intentionally changed. -->
<!-- PFC_UH_TRANSFORMER_TERMINAL_BUS_AUTHORITY_20260926: UH transformer displayed PRI/SEC/TER currents are reconciled to the independently solved physical terminal-bus currents across zero-Z hosted-terminal groups; raw branch recovery retained for audit. -->
<!-- PFC_TRANSFORMER_K_FACTOR_ONELINE_20260926: Balanced H calculates RMS-normalized PRI/SEC/TER K-factor; UH calculates per-phase winding K-factor and governing K; both display on one-line and detailed results. -->
<!-- PFC_LIGHTNING_REPORT_RUNTIME_ROWS_FIX_20260926: Fixes fatal rows.join TypeError in Lightning report time-domain table; rptTable now fault-contains scalar/string row payloads and Lightning tdRows remains an array. -->
<!-- PFC_LIGHTNING_ZSOURCE_REPORT_TRACE_20260926: Direct-strike Lightning report now shows transient source-impedance derivation, including front-time frequency, ground R/L/X/Z, connected branch surge impedances, parallel node equivalent, multi-node averaging, and feeder Z0/2 split. -->
<!-- PFC_LF_DEEP_VALIDATION_20260926: Tightens LF-001 hand reference to include utility Thevenin impedance; adds P/Q/S/PF/I, loss, source/bus and transformer winding parity hard gates. Solver unchanged. -->
<!-- PFC_AHF_CONNECTED_BUS_THDI_TARGET_20260926: AHF closed-loop control targets THDi only at the physical bus directly connected to the AHF. THDv target control removed; effective post-filter THDi and THDv remain calculated and reported. Legacy THDv-target projects normalize to THDi target. -->
<!-- PFC_LF_ULF_BUS_2DP_DISPLAY_20260927: Balanced LF and ULF one-line bus operating results use 2 decimal places for bus current/apparent-power values; ULF bus phase voltage/current rows and bus results table use 2 decimals. Feeder/equipment formatting and solver equations are unchanged. -->
<!-- PFC_LF_ULF_BUS_VDROP_PERCENT_DISPLAY_20260927: Adds %VD to every visible AC bus result block for balanced LF and ULF in Compact/Engineering/Detailed display densities. Balanced LF %VD = (Vnom - Vsolved)/Vnom × 100; ULF %VD uses average solved line-line voltage versus nominal bus line-line voltage. Display/result presentation only; LF/ULF solver equations are unchanged. -->
<!-- PFC_LF_ULF_DISPLAYED_PU_VDROP_ALIGNMENT_20260927: Bus %VD is derived from the same rounded PU value shown beside it. One-line LF/ULF PU is 3 decimals, therefore displayed %VD = (1 - displayed 3-decimal PU) × 100. Report LF PU uses its displayed precision and derives %VD from that same displayed PU. Solver voltages and full-precision internal results are unchanged. -->
<!-- PFC_HARMONIC_SOURCE_CURRENT_PHASE_REFERENCE_20260927: IEEE/current-source harmonics now retain profile magnitudes but reference harmonic phase to each nonlinear source fundamental current/PF angle; preserves transformer phase-shift cancellation and prevents artificial fully constructive upstream aggregation; the same phase-reference rule is applied independently in balanced H and UH. -->
<!-- PFC_MV_TRANSFORMER_PRIMARY_BUS_LF_ULF_FIX_20260927: LF transformer terminal parity is limited to the transformer hosted auto-node and no longer overwrites an adjacent MV junction bus with one transformer winding flow. Balanced-limit ULF gives priority to the authoritative physical-bus LF resultant before transformer terminal fallback. Solver equations unchanged; result ownership/display basis corrected. -->
<!-- PFC_MV_TRANSFORMER_H_UH_BUS_OWNERSHIP_FIX_20260927: Balanced H and UH now mirror LF/ULF transformer-terminal ownership. Real MV junction buses retain their authoritative upstream/resultant bus current; only the transformer's own hosted auto-node may inherit winding-terminal current. UH transformer windings retain exact recovered transformer-branch phasors and use hosted-terminal bus phasors only as a missing-record fallback. Harmonic solver network equations are unchanged. -->
<!-- PFC_AHF_BALANCED_ABSOLUTE_PHASOR_FIX_20260927: Balanced Harmonics now treats the AHF closed-loop runtime command angle as an already-resolved network phasor angle, matching UH. Prevents double application of transformer/local fundamental phase displacement to AHF compensation current. Non-AHF harmonic source phase-reference behavior is unchanged. -->
<!-- PFC_AHF_TARGET_BUS_SELECTION_20260928: AHF harmonic/UH/PF control can explicitly target a user-selected in-service AC bus independently of the physical injection bus; Connected Bus and Nearest PCC modes retained. -->
<!-- PFC_AHF_NO_HOST_BUS_20260928: Active harmonic filters no longer create an owned hosted/physical BUS node when connected by feeder. New AHF feeders terminate directly on the AHF top terminal; legacy AHF-owned auto buses are collapsed on startup/open and their external feeders are reconnected directly. AHF target/sense bus remains independently selectable. -->
<!-- PFC_EQUIPMENT_SELECTION_TAB_20260928: Electrical Sizing adds independent Equipment Selection tab; former Equipment Sizing tab renamed Wire Sizing. Adds standard-size recommendation paths for transformer, PF capacitor, passive filter, AHF, generator, UPS, VFD, bus/switchgear, panel/switchboard/MCC, battery bank and motor starter. -->
<!-- PFC_AUTONOMOUS_RENDER_PIPELINE_20260928: Canvas painting is requestAnimationFrame-owned. Legacy draw() calls only invalidate/coalesce; study completion schedules its own render after freshness/ERR commit, so LF/ULF/SC/H/UH/DC/Lightning results do not require canvas click, mouse movement, zoom, or selection to appear. -->
<!-- PFC_MODAL_TOP_BOTTOM_DRAG_20260928: All shared modal popups can be dragged from the full header bar or unused footer/bar area; buttons/inputs/links/labels remain interactive. Vertical clamping preserves a recoverable 34 px handle at either edge when the opposite handle is off-screen. -->
<!-- PFC_DESIGN_SIZING_UI_LABELS_20260928: Renames the Calculator ribbon/popup to QuickCalc; tabs are Conductor Sizing, LV Ampacity, MV Ampacity, and Equipment Sizing. UI-label-only change; calculation logic unchanged. -->
<!-- PFC_TEXT_CALLOUT_ANNOTATIONS_20260928: Adds native non-electrical Text / Callout annotations with multiline text, optional pointer arrow, draggable placement, editable arrow tip offsets, project save/open persistence, and no participation in electrical topology or studies. -->
<!-- PFC_TEXT_CALLOUT_ARROW_SIDE_20260928: Text/Callout leader can explicitly originate from Left or Right side; horizontal tip offset is normalized to selected side so leader does not cross through the note. -->
<!-- PFC_DC_STABLE_ONELINE_GEOMETRY_20260928: DC study result display no longer changes base feeder/equipment stroke width, study color, or opacity. DC results remain on datablocks/overlays; base one-line geometry stays identical before/after DC analysis. -->
<!-- PFC_LF_TRANSFORMER_SECONDARY_BUS_PARITY_2DP_FIX_20261001:
Balanced Load Flow transformer/bus presentation correction.
- Immediate secondary/tertiary buses connected by a zero-impedance Direct Connection now inherit the solved winding receiving-side P/Q/kVA/current, preventing primary-side apparent power (including transformer loss) from crossing the voltage boundary in bus reconstruction.
- Primary-bus overwrite remains restricted to a transformer-owned hosted auto-node so an upstream MV junction bus is not replaced by one winding flow.
- Transformer LF PRI/SEC one-line currents and LF report transformer currents/kVA use 2 decimal places.
- Load-flow network equations and Newton-Raphson solver are unchanged; this corrects solved-result ownership/presentation.
-->
<!-- PFC_TRANSFORMER_IMPEDANCE_TERMINAL_NODE_RULE_20261001: Impedance feeder -> hosted transformer terminal bus; direct zero-Z physical bus connection -> no intermediate hosted bus. -->
<!-- PFC_UH_VISIBLE_TRANSFORMER_SECONDARY_BUS_PARITY_FIX_20261001: UH visible bus directly on a transformer winding uses exact ULF/LF winding phase current when no upstream impedance feeder exists; real multi-branch junction buses retain their own resultant current basis. Solver equations unchanged; result ownership/THDi denominator corrected. -->

<!-- PFC_ALL_FEEDER_RESULT_2DP_20261001: Load/branch feeder current and apparent-power result presentation standardized to 2 decimal places across LF, ULF, H and UH. Calculation values and solver equations unchanged. -->
<!-- PFC_MASTER_H_UH_FEEDER_2DP_VERIFIED_20261001: Balanced Harmonics feeder one-line and feeder table I1/THDi/Ih/Total RMS use 2 decimals; UH feeder phase RMS/THDi verified at 2 decimals. Formatting only. -->
<!-- PFC_SINGLE_FEEDER_BUS_PARITY_ALL_STUDIES_AND_2DP_FEEDERS_20261001: Simple radial bus regions bounded by exactly one real feeder now display that feeder through-current in LF/ULF/H/UH; source regions with local branch equipment are excluded. All one-line harmonic feeder RMS current formatting is 2 decimals. Solver equations unchanged. -->
<!-- PFC_GROUNDING_MANUAL_AUTO_BASIS_20261001: Grounding sizing basis decoupled from one-line topology by default. Generator/transformer SDS derived-conductor basis now supports Manual (default: 2 sets x 500 kcmil Cu, 1 conductor/phase/set) or Auto from one-line. Feeder EGC breaker basis now supports Manual (default: 400 A) or Auto from assigned one-line OCPD. Auto remains optional; calculation engines use the selected basis explicitly. -->
<!-- PFC_SERVICE_EQUIPMENT_MANUAL_AUTO_BASIS_20261001: Service Equipment (SES) grounding/bonding sizing now supports Manual (default) or Auto incoming-service-conductor basis. Manual default is 2 sets x 500 kcmil Cu, 1 conductor/phase/set. GEC and MBJ use the selected service-conductor basis; Auto traces the utility-to-service-equipment one-line path. Downstream feeder EGC remains independently based on the selected feeder OCPD basis. -->
<!-- PFC_SES_BUS_MBJ_GEC_ONELINE_PRIORITY_20261001: Service Equipment bus/device grounding result block now places MBJ REC and GEC REC immediately below the SES heading so both calculated service grounding conductors are always visible before source/basis details. Calculation engine unchanged; display/result ordering only. -->
<!-- PFC_MANUAL_GROUND_WIRE_TO_FEEDER_20261001: Adds explicit user-controlled Apply to Feeder workflow for calculated GEC/MBJ/SBJ/SSBJ conductors. Assigned ground/bond conductors are stored on the selected feeder and included in conduit conductor inventory/fill sizing. No automatic routing/assignment is performed. -->
<!-- PFC_DERIVED_FEEDER_SSBJ_ROLE_20261001: Each physical feeder can be explicitly classified as Feeder (default) or Derived Conductor. A Derived Conductor suppresses EGC treatment and uses a calculated per-raceway SSBJ for grounding display, conduit inventory, and cost inventory. -->
<!-- PFC_DESIGN_CALCULATORS_DC_BATTERY_DCVD_20261002:
Adds two independent Design Calculators only: DC Battery Size Estimator and DC Voltage Drop Calculator.
The battery estimator uses minimum-DC-voltage current, runtime, conversion efficiency, DOD, EOL capacity, temperature factor, design margin, and user-entered unit V/Ah for preliminary series/parallel bank sizing.
The DC voltage-drop estimator uses the same PowerFlowCheck DC screening R20 conductor library and Cu/Al temperature correction as the native DC module; current mode uses I*R loop and constant-power mode solves the nonlinear receiving-voltage quadratic.
Existing AC voltage-drop, PF capacitor, passive-filter, AHF calculators and LF/ULF/SC/H/UH/DC solver equations are unchanged.
-->
<!-- PFC_DC_BATTERY_COMMON_NOMINAL_VOLTAGES_20261002:
DC Battery Size Estimator nominal battery voltage changed from free-entry to common VDC dropdown.
Available values: 12, 24, 36, 48, 60, 72, 96, 110, 120, 125, 130, 192, 240, 250, 360, 384, 480, 540 VDC.
Minimum design voltage remains independently editable. No calculation equations or other Design Calculators changed.
-->
<!-- PFC_MAX_ESC_AND_TYPED_CHROME_VISIBILITY_20261002:
Max Window is latched: repeated max commands/clicks do not restore normal mode; Esc is the explicit restore action.
Adds typed layout commands hidel/unhidel (left equipment palette), hider/unhider (right Properties), hidet/unhidet (top ribbon).
Hidden areas release their grid space to the canvas and remain hidden in Max Window mode. Commands are listed in the complete shortcut table.
No engineering solver or Design Calculator equations changed.
-->
<!-- PFC_MAX_PERSISTS_ACROSS_PROJECT_OPEN_20261002:
PowerFlowCheck Max Window now uses an independent latched state that project Open/import cannot clear.
Opening a file may cause the browser to leave native Fullscreen for security; the application Max layout remains active and reasserts native Fullscreen after file selection when permitted.
Only Esc clears the Max latch. Project data and engineering calculations are unchanged.
-->
<!-- PFC_HIDEL_TOOLBAR_ONLY_20261002:
Typed command hidel now hides only the left Equipment toolbar/palette contents.
The canvas/canvas-wrap is never targeted by the hidel rule; the freed left grid column is assigned to the canvas.
unhidel restores the Equipment toolbar. Other layout commands and Max behavior are unchanged.
-->
<!-- PFC_HIDET_TOP_RIBBON_ONLY_CANVAS_PRESERVED_20261002:
hidet now hides only the top application ribbon and collapses only the ribbon grid row.
The main row, canvas wrapper, and canvas are explicitly preserved/visible in normal and Max Window modes.
unhidet restores the ribbon. Other hide commands, Max persistence, calculators, and engineering solvers are unchanged.
-->
<!-- PFC_HIDET_GRID_PLACEMENT_ROOT_CAUSE_FIX_20261002:
Root cause corrected: when .ribbon is display:none it is removed from CSS Grid placement, so the prior 3-row
0/1fr/status definition placed .main into the zero-height first row and hid the canvas.
hidet now switches .app to a true two-row grid: minmax(0,1fr) for main/canvas + 27px status.
Ribbon alone is hidden; main/canvas and status are explicitly preserved in normal and Max Window modes.
No engineering solvers, project data, or Design Calculator equations changed.
-->
<!-- PFC_MODEL_INTEGRITY_DATA_REQUIRED_DIAGNOSTICS_20261002:
Model Integrity Check now reports each DATA REQUIRED condition with Study, Missing/Unavailable Item, Reason,
and Required Action. It distinguishes model/topology FAIL/REVIEW findings from engineering-data prerequisites.
Missing current-study results, unavailable engineering result packages, and equipment result records lacking
rating/limit criteria are surfaced without changing the underlying solver or integrity equations.
-->
<!-- PFC_DESIGN_CALCULATORS_UX_IMPROVEMENT_20261002:
UI-only enhancement to Design Calculators. Adds six calculator sub-tabs, contextual battery/DC labels and
field visibility, AHF Basic/Advanced input modes, preliminary passive-filter warning, recommendation-first
result cards, and consistent SIZE action labels. Existing calculator math functions and engineering solvers
are not modified.
-->
<!-- PFC_DESIGN_CALCULATORS_UX_9_3_RESPONSIVE_20261002:
Second-stage Design Calculator UX upgrade. Adds responsive modal/card reflow, field-level validation, inline
engineering help, persistent in-session calculator inputs, result-first cards with collapsible Engineering
Details, Copy Result, safe Apply to Selected equipment/feeder actions, per-calculator Reset Defaults, and
responsive viewport clamping. Existing Design Calculator mathematics and LF/ULF/SC/H/UH/DC solvers are unchanged.
-->
<!-- PFC_DESIGN_CALCULATORS_FREEZE_FIX_20261002:
Root cause: Design Calculator UX used MutationObservers that modified the same observed result containers,
creating a self-sustaining childList mutation loop; the 9.3 layer also added a second document-wide observer
and 1-second polling enhancer. Replaced with guarded one-time/event-driven initialization and explicit
post-calculate summary refresh. Removed periodic UX polling. Calculator math and production engineering solvers
are unchanged.
-->
<!-- PFC_DESIGN_CALCULATOR_RECOMMENDATION_LIFECYCLE_FIX_20261002:
Fixes result lifecycle after the freeze correction. The recommendation renderer is explicitly bridged between
the original UX module and the 9.3 event-driven wrapper. Freshly calculated results now retain Recommendation
above collapsible Engineering Details. Calculator opening/reset shows a neutral "Calculate to generate
recommendation" state, and editing inputs marks the prior result stale until recalculated. No MutationObserver
result loop or polling is reintroduced. Calculator math and engineering solvers are unchanged.
-->
<!-- PFC_EQUIPMENT_SIZING_UX_9_3_20261002:
Equipment Sizing UX enhancement applied consistently to all supported equipment paths:
Transformer, PF Capacitor, Passive Harmonic Filter, AHF, Generator, UPS, VFD, Bus/Switchgear,
Panel/Switchboard/MCC, Battery Bank, and Motor Starter. Adds selected-equipment context,
Basic/Advanced inputs, responsive reflow, field validation, recommendation-first result,
Current/Required/Recommended comparison, collapsible engineering details, and clearer Apply labels.
Existing pfcEqSel calculation equations, standard-size libraries, and engineering solvers are unchanged.
-->
<!-- PFC_EQUIPMENT_SIZING_UX_9_3_STARTUP_FIX_20261003:
Repairs the Equipment Sizing UX insertion location. The prior build inserted the UX block at a </body>
inside a JavaScript print-template literal, corrupting the main script and causing startup SyntaxError,
missing validation/generator functions, and Phase2 native-handler cascades. The UX block is now placed only
before the application's true final document </body>. Equipment sizing equations and production solvers are unchanged.
-->
<!-- PFC_MV_AMPACITY_9_3_20261003:
Expands MV Ampacity from the prior 311.60(C)(77)/(78)-only path to NEC 2020 Tables 311.60(C)(67) through (86)
for triplexed/isolated/in-conduit air arrangements, underground duct arrangements, and direct-buried arrangements.
Adds installation-method-driven table selection, NEC 311.60(D)(4) ambient correction, deeper-burial screening,
shield-grounding gates for applicable tables, Rho/load-factor DATA REQUIRED gates, recommendation-first results,
Current/Required/Available comparison, Basic/Advanced inputs and responsive layout. No interpolation is used.
Other PowerFlowCheck engineering solvers are unchanged.
-->
<!-- PFC_LV_AMPACITY_9_5_20261003:
LV Ampacity upgraded to a table-driven 9.5 workflow. Adds NEC Table 310.17 free-air single-conductor data
alongside the existing Table 310.16 path, automatic current-carrying-conductor/neutral logic for common circuit
arrangements per 310.15(E), Table 310.15(C)(1) adjustment logic for raceway/cable installations, Basic/Advanced
modes, installed-conductor CHECK and minimum-conductor SIZE modes, parallel-set screening, recommendation-first
results, responsive layout, DATA REQUIRED gates for unsupported/special installations, and explicit apply-to-feeder.
Existing production load-flow, short-circuit, harmonic, DC, MV-ampacity, and equipment-sizing solvers are unchanged.
-->
<!-- PFC_LV_AMPACITY_9_5_INSTALLATION_VISIBLE_FIX_20261003:
Fixes LV 9.5 panel initialization. The QuickCalc ribbon button retained an earlier bound opener, so replacing
window.openElectricalSizingCalculator alone did not guarantee the enhanced LV panel was injected. Adds a post-open
button hook and an already-open dialog repair path. Installation Method is now rendered at the top of LV Ampacity.
Calculation equations and NEC table data are unchanged.
-->
<!-- PFC_LV_AMPACITY_9_5_INSTALLATION_METHOD_DEFINITIVE_REPAIR_20261003:
Definitive repair for missing LV Installation Method selector. The app contains historical QuickCalc/MV tab
wrappers that can retain older LV activation handlers. LV 9.5 now validates/rebuilds the LV panel at the LV tab
click itself (capture phase) and once after all finite QuickCalc injectors complete. A stale panel is replaced
whenever #na_install or #na_lv_mode is missing. No polling/MutationObserver is used. Calculations/tables unchanged.
-->
<!-- PFC_LV_AMPACITY_9_5_NATIVE_INSTALLATION_FIX_20261003:
Repairs the missing Installation Method by modifying the native QuickCalc LV panel itself rather than relying
on post-open injection. The built-in panel now contains Installation Method and Calculation Mode controls; the native
LV calculator directly switches between NEC Table 310.16 and Table 310.17, performs automatic common-circuit CCC/
neutral determination, supports selected-conductor check and minimum-conductor sizing, and returns DATA REQUIRED
for cable-tray/special installations. This path remains functional even if later UI wrappers do not execute.
-->
<!-- PFC_CONDUCTOR_SIZING_9_5_20261003:
Conductor Sizing optimization upgrade. Native sizing templates receive Installation Method, circuit/neutral/CCC basis,
sizing-current basis and optimization objective controls. Final authoritative sizing layer supports NEC Table 310.16
and 310.17 paths, automatic common-circuit CCC/neutral treatment, LF/ULF/code/manual current basis, practical candidate
optimization, recommendation-first results, Existing/Required/Recommended comparison, governing-criterion reporting,
and complete Apply-to-Feeder persistence. Cable tray/special installations return DATA REQUIRED instead of extrapolation.
No LF/ULF/SC/H/UH/DC solver equations are changed.
Native control injections: 3.
-->
<!-- PFC_SCIENTIFIC_CALCULATOR_TAB_20261003:
Adds a separate standalone Scientific Calculator tab to QuickCalc.
Functions include DEG/RAD trig, inverse trig, log10, ln, square root, square, powers, reciprocal,
absolute value, factorial, percent, pi/e, memory, parentheses, history and basic arithmetic.
The calculator is isolated from one-line/project engineering data and does not change any solver.
-->
<!-- PFC_DESIGN_CALCS_XFMR_CURRENT_MOTOR_FLA_20261003:
Adds two Design Calculator subtabs:
1) Transformer Primary / Secondary Current — 1Φ/3Φ rated current from kVA and primary/secondary nominal voltage.
2) Motor FLA — NEC Article 430 table lookup using existing PowerFlowCheck motor FLC dataset and system-voltage mapping.
Motor lookup uses Table 430.248 (1Φ) or 430.250 (3Φ), filters HP choices to valid table entries for the selected
phase/voltage basis, and does not interpolate. Existing engineering solvers/calculators are unchanged.
-->
<!-- PFC_MOTOR_FLA_FIX_SCI_CALC_LARGER_20261003:
Fixes Design Calculator Motor FLA dropdown population by removing incorrect window.* access to top-level const
motor voltage/HP datasets. The calculator now uses local dropdown lists and validates each HP against the existing
pfcESMotorFLC Article 430 engine. Scientific Calculator enlarged: wider panel, larger expression/result display,
larger keys, and conventional numeric keypad grouping (7-8-9, 4-5-6, 1-2-3, 0) after scientific functions.
Engineering solver equations remain unchanged.
-->
<!-- PFC_MOTOR_FLA_DEFINITIVE_REPAIR_20261003:
Motor FLA calculator made self-contained. It carries an exact local copy of the current embedded NEC motor FLC
dataset, owns its own voltage-basis mapping and HP lists, and rebuilds the voltage/HP dropdowns every time the
Motor FLA calculator opens or phase/voltage changes. This eliminates cross-script scope dependence that left the
HP dropdown empty. Scientific Calculator enlargement from the previous build is preserved.
-->
<!-- PFC_DESIGN_CALCULATORS_ALL_TABS_REPAIRED_20261003:
Repairs Design Calculator navigation after Transformer Current / Motor FLA additions. The custom calculators had
written inline display:none to every .pfc-dc-pane; the original six-tab controller only toggles the active class,
so inline display:none prevented AC Voltage Drop, PF Capacitor, Passive Filter, AHF, DC Battery and DC Voltage Drop
from reappearing. Removed 1 conflicting hide-all statements and added a unified eight-tab compatibility
guard. Existing calculator equations are unchanged.
-->
<!-- PFC_DESIGN_SIZING_GROUNDING_TAB_20261003:
Adds a separate GROUNDING tab to QuickCalc. The standalone calculator sizes:
MBJ and SBJ using the native NEC 2020 Table 250.102(C)(1) bonding-jumper engine;
GEC using the native NEC 2020 Table 250.66 engine plus supported electrode-specific limitations;
EGC using the native NEC 2020 Table 250.122 sizing path.
Default conductor basis is 2 sets x 500 kcmil Cu, 1 conductor/phase/set. The calculator is non-destructive and
does not alter the one-line. Existing QuickCalc, Design Calculators, Scientific Calculator, and solver equations
are unchanged.
-->
<!-- PFC_DESIGN_SIZING_GROUNDING_COMPLETE_CALC_FIX_20261003:
Repairs the standalone Grounding tab so it no longer depends on inaccessible lexical-scope grounding functions.
The tab now contains local copies of the same NEC 2020 Table 250.102(C)(1), Table 250.66, electrode-limit, and
Table 250.122 sizing rules used by PowerFlowCheck. Normal entered cases calculate MBJ, SBJ, GEC and EGC directly.
REVIEW is used where final material/installation verification is appropriate; DATA REQUIRED is reserved for truly
missing required numeric input such as a zero OCPD basis.
-->
<!-- PFC_GROUNDING_SUBTABS_SSBJ_20261003:
Reorganizes the QuickCalc GROUNDING tab into five internal calculators: MBJ, SBJ, SSBJ, GEC and EGC.
Adds Supply-Side Bonding Jumper sizing with two explicit bases:
(1) individual SSBJ per raceway/set, sized from phase-conductor area in that raceway, and
(2) one combined SSBJ serving the total parallel set, sized from equivalent combined area.
SSBJ uses the same self-contained NEC 2020 Table 250.102(C)(1) bonding-jumper engine and flags the
parallel-raceway NEC 250.102(C)(2) verification point. Existing QuickCalc tabs and calculations are preserved.
-->
<!-- PFC_GROUNDING_9_5_20261003:
Grounding calculator hardening toward 9.5:
- Corrects NEC 2020 Table 250.122 aluminum EGC rows at 5000 A and 6000 A to 1250 kcmil.
- Adds EGC proportional upsizing workflow using required-vs-installed phase conductor circular-mil ratio per 250.122(B).
- Adds SSBJ parallel-set/raceway consistency validation.
- Adds MBJ application screening and SBJ separately-derived-system bonding checks.
- Replaces prior mixed-material above-table shortcut with 75C ampacity-equivalent supply-conductor conversion before applying the 12.5% Table 250.102(C)(1) Note 1/2 area rule.
- Adds calculation trace sections for MBJ, SBJ, SSBJ, GEC, and EGC.
No LF/ULF/SC/H/UH/DC solver equations are changed.
-->
<!-- PFC_QUICKCALC_RENAME_20261003:
Renames the user-facing "Design Sizing" product/module label to "QuickCalc" throughout PowerFlowCheck.
Internal element IDs, function names, solver interfaces, and calculation logic are unchanged.
Updated 37 exact label/reference occurrences, including ribbon text, modal headings, alerts, helper text,
and modal title-detection logic.
-->
<!-- PFC_LIGHTNING_IEEE_WAVEFORM_AND_SCREENING_HARDENING_20261004:
- Replaces the former front/2.2 and tail/0.693 double-exponential approximation with a calibrated n=3 Heidler impulse generator for standard current impulses.
- 8/20 us, 4/10 us, and 10/350 us presets are calibrated against standard virtual-front / half-value timing definitions rather than treating the labels as raw time constants.
- Adds an IEEE C62.41.2-style 1.2/50 us open-circuit voltage / 8/20 us short-circuit current Combination Wave source with nominal 2-ohm source impedance.
- Stores current/voltage waveform timing metrics and adds hard-gate regression tests for the standard impulses and Combination Wave source relation.
- Time-domain voltage reconstruction uses the injected voltage waveform for Combination Wave studies instead of incorrectly reusing the current waveform shape.
- Default transformer/UPS/VFD/converter transfer factors and nearby/enclosure coupling remain SCREENING assumptions; PASS withstand results derived through those defaults are downgraded to REVIEW until project/manufacturer transient-transfer data are entered.
- Existing LF/ULF/SC/H/UH/DC and non-Lightning equations are unchanged.
-->
<!-- PFC_MODULAR_PACKAGE_20261007: Original monolithic build split into index.html plus external CSS/JS files. Script/style order and IDs are preserved; application/json data blocks remain embedded for offline file:// compatibility. -->
<!DOCTYPE html>
<!-- PFC_ELECTRICAL_SIZING_WIRE_SIZE_SELECTOR_20260927: Equipment Sizing adds AUTO/manual wire-size selector; manual wire holds size fixed and calculates minimum passing parallel sets up to Maximum Parallel Sets. -->
<!-- PFC_UH_TRANSFORMER_TERMINAL_GROUP_RECONCILE_20260926: UH transformer winding currents use exact branch recovery first and fall back to independently solved physical terminal-bus currents in the same zero-Z contraction group when imported hosted-terminal records are empty. -->
<!-- PFC_UH_LF_TRANSFORMER_FINAL_PARITY_FIX_20260926: silent LF/ULF prerequisites no longer hijack the active one-line; balanced LF reconciles physical transformer-terminal buses to solved winding current; UH finalizes transformer winding RMS/THDi before display/parity. -->
<!-- PFC_UH_TRANSFORMER_RUNTIME_TYPE_FIX_20260926: Normalizes transformer2w/transformer3w recognition throughout ULF/UH terminal ownership and makes UH transformer terminal-current recovery fault-contained. -->
<!-- PFC_ULF_UTILITY_BUS_PARITY_AND_1DP_20260926: ULF utility current is reconciled to its directly connected zero-Z physical bus; ULF current displays use 1 decimal place including transformer PRI/SEC/TER. -->
<!-- PFC_SOURCE_PRIMARY_CHAIN_PARITY_20261001: Utility, ideal-connected primary bus, and transformer primary winding share one authoritative current result in LF/ULF/H/UH when no impedance-bearing or branching element exists between them. Utility current display standardized to 2 decimals across studies. -->
<!-- PFC_LF_TRANSFORMER_SECONDARY_BUS_CURRENT_FIX_20260926: Recomputes each visible physical bus current from solved bus kVA and that bus own voltage base after zero-Z contraction, preventing primary-side current magnitude from being copied across transformer voltage boundaries. -->
<!-- PFC_H_UH_TRANSFORMER_BUS_CURRENT_BASIS_FIX_20260926: Corrects transformer-adjacent bus I1 to the actual winding-side current (PRI/SEC/TER) in balanced ULF, H and UH; prevents primary ampere magnitude from crossing a voltage-ratio boundary and inflating/deflating THDi. -->
<!-- PFC_LIGHTNING_SURGE_FRONT_PRESETS_20260926: Lightning settings now support selectable 8/20, 10/350, 4/10 current-impulse presets plus Custom front/tail timing; selected profile is stored in results and shown in Lightning results/report. -->
<!-- PFC_GLOBAL_REPORT_LIGHTNING_PRINT_MODE_FIX_20260926: Global multi-study printing now invokes Lightning print-optimized rendering, limits Lightning-only print table density, and preserves full Lightning detail in View/Export modes. -->

<!-- PFC_UH_TRANSFORMER_TERMINAL_PARITY_FIX_20260926: UH now recovers transformer primary/secondary/tertiary harmonic terminal currents from the independent A/B/C solved voltages using harmonicBranchTerminalCurrents(), publishes winding-specific RMS/THDi, and compares balanced transformer primary results with H. -->
<!-- PFC_LIGHTNING_TRANSFORMER_TRANSFER_FIX_20260926: Lightning transient network reconstructs transformer terminal buses from direct connection topology, inserts zero-delay screening/project surge-transfer branches, propagates to secondary/tertiary networks, records transformer transfer results, and reports transfer factor/basis. -->
<!-- PFC_LIGHTNING_ENGINEERING_REPORT_20260926: Adds selectable Lightning / Surge engineering report with method-specific assumptions, equations, substituted values, coupling/propagation/SPD/withstand steps, time-domain table, and integrity/validation traceability. -->
<!-- PFC_LIGHTNING_DIRECT_METAL_ENCLOSURE_20260926: Adds Direct Strike to Metal Enclosure / Switchboard event with explicit current division, enclosure IR+Ldi/dt rise, internal magnetic/electric coupling, GPR coupling, full-network propagation and SPD/withstand evaluation. Screening assumptions remain user-editable and traceable. -->
<!-- PFC_SELF_AUDITED_INTEGRATION_20260924: Adds centralized load-family display policy plus 288-case LF/ULF/H/UH × density regression audit; update integration hard-gate artifact. -->
<!-- PFC_ALL_LOAD_TYPES_SELECTED_PARAMETERS_20260924: LF/ULF/H/UH one-line results for load, panel, switchboard, switchgear, MCC and motor obey only the selected input basis in Properties; final shared renderer prevents later density wrappers from re-adding derived quantities. -->
<!-- PFC_LOAD_SELECTED_PARAMETERS_ONLY_20260924: Load-symbol one-line result blocks in LF/ULF/H/UH display only the two quantities selected by Load Input Method; calculations and detailed study results remain unchanged. -->
<!-- PFC_UH_UI_FREEZE_FIX_20260923: UH hit-testing/rendering no longer calls buildNetworks()/validateNetwork. Source display ownership is cached during UH solve; pointer events are read-only against result maps. UH equipment visibility control added. -->
<!-- PFC_HARMONICS_CLEANUP_GATE_20260923: hard-gate H/UH nonlinear-device audit; VFD/UPS/rectifier/inverter I1/source-direction parity; active H/UH source stamps use direction-aware converter injection; no H-to-UH copying. -->
<!-- PFC_FORENSIC_AUDIT_20260923: H/UH stale-result and model-signature hardening; balanced parity aligns harmonic order policy without copying results; obsolete H->UH copy path removed; same-scope dead duplicate pointInRect and gsFrequencySimulate declarations removed after ownership audit. -->
<!-- PFC_LIGHTNING_TIME_DOMAIN_XY_TABLE_20260926: Lightning waveform dialog now shows numeric time/voltage axes and a traceable time-domain table of calculated voltage, local surge current, and injected source current samples. -->
<!-- PFC_LIGHTNING_FULL_PROPAGATION_STAGE8_20260923: Permanent hard-gate tests cover all-connected-bus propagation, arrival timing, feeder strike position, missing-bus failure detection, SPD current-event di/dt, and prior L1-L10 checks. -->
<!-- PFC_LIGHTNING_SPD_FRESH_EVENT_STAGE7_20260923: SPD lead-inductance clamping now receives current-event di/dt explicitly, eliminating stale prior-run dependence; default equipment/transformer surge transfer is visibly classified SCREENING. -->
<!-- PFC_LIGHTNING_DIRECTION_STAGE6_20260923: Physical feeders display subtle dominant surge-propagation arrows from branch directional wavefront peaks; direct/internal connections remain annotation-free. -->
<!-- PFC_LIGHTNING_WITHSTAND_PROPERTIES_20260924: Adds BIL/Uimp/custom impulse-withstand fields to normal bus/equipment Properties; Lightning one-line shows WITHSTAND NOT ASSIGNED when propagation succeeds but no rating is entered. -->
<!-- PFC_LIGHTNING_SUMMARY_STAGE5_20260923: Automatically identifies worst surge location, lowest entered withstand margin, failure count, and surfaces them in Lightning Results/status. -->
<!-- PFC_LIGHTNING_BUS_WAVEFORM_STAGE4_20260923: Stores bounded significant arrivals per reached node and reconstructs location-specific voltage waveforms accessible from Lightning Results. -->
<!-- PFC_LIGHTNING_COVERAGE_STAGE3_20260923: Lightning run audits every topologically reachable node/bus; missing reachable results or propagation truncation makes study integrity FAIL instead of silently omitting buses. -->
<!-- PFC_LIGHTNING_WAVEFRONT_STAGE2_20260923: Replaced shortest-path peak propagation with bounded bidirectional multi-path wavefront propagation, distributed-line delay/reflection screening, and branch-direction arrival tracking. -->
<!-- PFC_LIGHTNING_STRIKE_LOCATION_STAGE1_20260923: Lightning target supports explicit feeder strike percentage, visible strike marker, and bidirectional feeder injection metadata. -->
<!-- PFC_LIGHTNING_RUNTIME_SCOPE_AND_CRASH_FIX_20260923: Lightning now executes inside the native PowerFlowCheck closure; startup validation and one-line rendering are fault-contained so Lightning cannot abort the base canvas. LF annotation formatting is null-safe for objects without current LF records. -->
<!-- PFC_LIGHTNING_PHASED_20260923: Dedicated Lightning/Surge transient module L1-L10 architecture, direct/induced events, RLC/distributed screening propagation, SPD clamping, transient grounding, equipment transfer, PFC-ERR-1 publication, movable one-line results, dot-node suppression, validation hard gates. Existing LF/ULF/SC/H/UH/DC solvers are not modified by the lightning engine. -->
<!-- PFC_DOT_NODE_NO_RESULTS_GLOBAL_20260923: Global one-line presentation rule: bus objects displayed as Node Dot never render study/result annotations in any module. Converting the same bus to Bus Line immediately restores eligible LF/ULF/SC/H/UH/DC/Reliability/Grounding/Cost/data-block results. Solver data and study result maps are unchanged; this is display/hit-test only. -->
<!-- PFC_COMPACT_DEFAULT_RESULTS_20260923: Compact is the factory default one-line result density. Added global Compact / Engineering / Detailed selector in Data Block Manager. Compact blocks prioritize governing current/phase, voltage, loading/status, and governing condition while preserving full native solver records and movable text geometry. No solver algorithms changed. -->
<!-- PFC_ALL_EQUIPMENT_BUS_RESULT_DRAG_PARITY_20260923: Every visible native result block on equipment and buses now uses identical draw/hit/drag geometry and persistent object-relative offsets. LF/ULF/SC/H/UH/Reliability/DC/Generator Sizing/Motor Starting/Grounding/Cost result blocks are covered; no electrical solver logic changed. -->
<!-- PFC_ITEMS_2_TO_10_SEQUENTIAL_20260923: Sequentially gated engineering-result hardening completed on top of PFC-ERR-1: terminal convention; unified current definitions; LF/ULF parity audit; H/UH independent parity audit; operating/evaluation separation; PASS/REVIEW/FAIL/DATA REQUIRED status contract; Actual/Limit/Margin/Status criteria; governing-condition framework; and study-level Engineering Integrity. Core LF/ULF/H/UH/SC/DC solver function bodies are unchanged from the Item-1 baseline by hash audit. -->

<!-- PFC_UNIVERSAL_ENGINEERING_RESULT_RECORD_20260923: Added one runtime Engineering Result Record (ERR v1) across LF/ULF/H/UH/SC/DC. Each published record identifies study, subject, terminal/direction/basis, normalized electrical quantities, phase/harmonic/fault-domain data, source map, data quality, input revision, and authoritative native solver record. Existing validated solvers are unchanged. Active-study publication is centralized through setActiveOneLineStudy; stale records are revision-gated. -->
<!-- PFC_LIGHTNING_LF_TEXT_NULLSAFE_FIX_20260923: LF annotation formatting now safely returns no text when no authoritative LF record exists, preventing pointer hit-testing from dereferencing null result records. -->
<!-- PFC_ALL_RESULTS_MOVABLE_20260923: All visible native study result text blocks now use their authoritative drawn-line resolver for hit testing and independent drag persistence across LF/ULF/H/UH/DC and existing studies; UH is treated as a native result lane; reset/show-all coverage includes ULF/UH and all result display slots. Direct equipment connection results remain hidden. -->
<!-- PFC_UNIFIED_ALL_EQUIPMENT_RESULTS_20260923: Unified native study-result presentation. LF/ULF/H/UH now expose authoritative solver results on every eligible in-service AC/DC bus and electrical equipment symbol. AC equipment without a dedicated object map resolves its physical terminal/incident branch record; pure-DC objects use a fresh companion result from the existing native DC network load-flow solver. No renderer performs electrical calculations or invents cross-domain A/B/C harmonic values. Direct equipment connection lines remain result-free. Per-study display-coverage audits record shown/missing objects. -->
<!-- PFC_HIDE_DIRECT_CONNECTION_STUDY_RESULTS_20260923: Internal/direct equipment connections (e.isConnection) remain electrically active in all studies but no longer render LF/ULF/H/UH/DC/Conduit/Grounding/Cost result blocks on the connection line. Results remain on equipment, buses, and physical feeders/cables. -->
<!-- PFC_LF_UTILITY_BUS_CURRENT_PARITY_FIX_20260923: Load-flow bus current aggregation corrected to form resultant complex P+jQ before deriving kVA/current; prior incoming-path logic summed branch kVA/current magnitudes and could overstate junction/main-bus amperes versus the directly connected utility source. Direct zero-impedance utility-to-bus current parity is also explicitly reconciled from the solved Thevenin source-branch current. -->
<!-- PFC_H_DISPLAY_RESOLVER_SOURCE_BUS_PARITY_20260923: Balanced Harmonics one-line resolver now makes a utility/generator on an ideal zero-impedance direct connection display the exact same harmonic bus record as its immediate downstream physical bus. This is display-only; solver remains independent. Added source/bus screen-parity audit. -->
<!-- PFC_H_UTILITY_MAIN_BUS_PARITY_FIX_20260923: Balanced Harmonics source current parity fixed. Physical utility and every bus on its ideal/zero-Z source connection chain now retain the same solved source/Thevenin current phasor set. The later LF bus-current parity pass no longer overwrites source-chain I1 with a different junction/busFlow current definition. Utility and immediate downstream bus therefore report identical RMS/THDi when no impedance or branch exists between them. -->

<!-- PFC_H_BALANCED_EQUIPMENT_DISPLAY_20260923: Balanced Harmonics equipment annotations now show one authoritative balanced Irms/THDi/loading/governing-order result; duplicated A/B/C/N rows removed. UH remains independent A/B/C/N phase-domain display. -->
<!-- PFC_H_EQUIPMENT_HARMONICS_DISPLAY_20260923: Balanced Harmonics one-line now exposes converter/equipment results (VFD, UPS, charger/rectifier, inverter and other assigned harmonic sources) in an A/B/C/N layout matching UH for direct comparison. H calculation engine is unchanged; display expands the authoritative balanced equipment RMS/THDi equally to A/B/C and shows neutral only when an explicit neutral path is modeled. -->
<!-- PFC_UH_TRIPLEN_UTILITY_PARITY_FIX_20260923: Independent UH now honors every harmonic order explicitly present in the same source profiles used by H, including triplen/zero-sequence orders. Prior UH incorrectly suppressed H3/H9 for generic 3-phase sources unless a 4-wire flag existed, producing ~88.1 A / 52.9% on the UPS feeder while H correctly retained the project profile and produced ~94.7 A / 69.2%. Zero-sequence phase current is now allowed to propagate through the network sequence/ground return path; the N conductor result is reported only where an explicit neutral conductor exists. Source/main-bus/utility A/B/C RMS and THDi are audited against independently solved H when available. -->
<!-- PFC_UH_BALANCED_EQUIPMENT_CURRENT_PARITY_FIX_20260922: In exact balanced-ULF parity, UH now feeds every 3-phase harmonic source from the same authoritative equipment operating-current evaluator used by H (without using H results). This removes zero-impedance connection-record ambiguity for UPS/VFD input current while retaining fully independent UH harmonic matrix solves. -->
<!-- PFC_UH_NET_SCOPE_FIX_20260922: fixed UH equipment finalization ReferenceError by resolving each nonlinear source to its owning energized network after the island solve; no out-of-scope net reference. -->
<!-- PFC_FILE_MODE_NO_IFRAME_20260923: Removed local-file iframe report printing. Standalone app no longer creates child frames, avoiding Chromium file: unique-origin security errors. UH remains in-process and offline. -->
<!-- PFC_UH_ULF_CURRENT_BASIS_FIX_20260923: UH bus RMS current now uses physical ULF source/upstream branch current rather than junction node injection; VFD/UPS/converter UH source current uses the exact ULF AC terminal current; nonlinear equipment A/B/C/N RMS and THDi are independently reported and H/UH parity audit includes equipment. -->
<!-- PFC_UH_INDEPENDENT_BALANCED_PARITY_FIX_20260922: UH remains an independent A/B/C phase-domain solve for balanced and unbalanced systems. It now uses the same contracted harmonic topology, frequency-dependent stamps, and transformer/local phase-shift reference rules as H while retaining ULF fundamental phase currents; balanced cases are verified by comparison, never copied from H. -->
<!-- PFC_UH_UNBALANCED_HARMONICS_20260922: Separate UH study added. UH automatically refreshes ULF, uses ULF phase-domain fundamental current/voltage basis, solves A/B/C harmonic nodal networks independently with existing frequency-dependent harmonic stamps, derives complex neutral/triplen current, publishes movable one-line A/B/C/N results, dedicated results/settings UI, KCL audit, and regression self-checks. Existing balanced Harmonics engine remains independent. -->
<!-- PFC_UH_NO_H_COLLAPSE_20260922: Removed H-collapse/copy path. UH always solves independently; balanced-equivalence is an audit criterion only. -->
<!-- PFC_H3_CONVERTER_HARMONICS_20260921: Harmonic source framework expanded to DC/AC PV-BESS inverters and AC/DC charger-rectifiers; automatic 6/12/18-pulse characteristic spectra, PWM inverter profiles, operating-direction-aware injection, LF-current basis, and permanent H3 regressions. H1/H2 propagation/frequency models retained. -->
<!-- PFC_H2_FREQUENCY_DEPENDENT_HARMONICS_20260921: Harmonic feeder impedance now uses positive/negative/zero-sequence project data by order; optional cable shunt capacitance is stamped frequency-dependently; transformer/source/motor harmonic impedance models are sequence-aware; H1 branch contraction retained. -->
<!-- PFC_H1_HARMONIC_BRANCH_PROPAGATION_HARDENING_20260921: Harmonic Yh solves contract ideal drawing connections into supernodes, recover exact currents on genuine feeder/transformer branches, retain per-winding transformer spectra, and publish KCL plus branch-continuity audits. -->
<!-- PFC_GROUP4_FINAL_INTEGRATION_AUDIT_20260921: Advanced VFD/UPS/inverter curves are authoritative through converter-coupling iterations; smart-inverter voltage dependence is included in sparse LF Jacobian; legacy fixed models remain default-compatible; Group 4 regression 12/12. -->
<!-- PFC_GROUP4_ADVANCED_CONVERTER_SMART_INVERTER_20260921: Advanced steady-state converter models add optional load-dependent VFD efficiency/input-PF curves, staged UPS rectifier/DC-link/inverter losses, editable inverter efficiency curves, Volt-VAR / Volt-Watt / Watt-VAR smart-inverter controls, and permanent Group 4 regressions. Legacy fixed-efficiency behavior remains the default for backward compatibility. -->
<!-- PFC_DC_CONVERTER_LF_ACCUMULATION_FIX_20260921: Rectifier reflected converter demand is recomputed from native DC demand + battery charging + current-pass downstream converter input demand, never accumulated across coupling iterations. Exact uploaded-project regression: 5 kW DC-DC load + 4 kW/0.95 PF inverter load. -->
<!-- PFC_DC_CONVERTER_LF_FULL_FIX_20260921: Corrected rectifier DC current/voltage unit handling, total reflected DC current and rating checks; grid-forming inverter now falls back to downstream AC topology demand when the solved source-injection record is zero; converter results enforce nonzero P/V -> nonzero I consistency and preserve common-core power balance. -->
<!-- PFC_DC_CONVERTER_LF_RESULT_PARITY_20260921: Charger/rectifier, DC-DC converter, and DC/AC inverter share the same native LF display path, visibility rules, and map-first/runtime-fallback result resolution. -->
<!-- PFC_DC_LF_EQUIPMENT_EVALUATION_20260921: DC equipment LF annotations now present engineering operating point, loading, efficiency, design margin, power direction, and governing limit/status for charger/rectifier, DC-DC converter, DC/AC inverter, and pure-DC network equipment. Static equipment labels retain ratings while operating results are kept in study-colored result blocks. -->
<!-- PFC_VFD_FEEDER_CURRENT_FALLBACK_20260921: VFD LF no longer accepts stale zero runtime when downstream topology has real motor/load demand; fresh topology estimate seeds line-side PQ and provides fallback when converter-output source injection resolves to zero. -->
<!-- PFC_DC_CONVERSION_SYMBOL_CLEANUP_20260921: Removed redundant internal equipment rectangles from charger/rectifier, DC-DC converter, and DC/AC inverter palette and one-line symbols. Terminal locations, hit bounds, connectivity, properties, and solver behavior are unchanged. -->
<!-- PFC_VFD_POWER_KVA_CURRENT_CONSISTENCY_20260921: VFD LF display now explicitly separates line-side IN and motor-side OUT kW/kVA/PF/current; VFD terminal currents use solved terminal voltage so the VFD IN current exactly matches the stamped incoming feeder current. Apparent-power relationships remain physically independent across the converter. -->
<!-- PFC_GROUP2_COUPLED_DC_EQUIPMENT_20260921: Native DC load flow now solves DC-DC converter input/output terminals as a coupled nonlinear element with regulated-voltage / constant-current / constant-power modes, converter efficiency, kW/current limits, charger current limiting, and battery recharge interaction in the same DC network equations. Group 1 common converter core retained. -->
<!-- PFC_DC_SYMBOL_RECTANGLE_FINAL_CLEANUP_20260921: Fixed drawSymbol control-flow fallthrough that redrew the generic 40x40 fallback box inside DC equipment. DC charger/rectifier, DC panel, DC-DC converter, and DC/AC inverter outer bodies are normalized to the AC VFD 44x50 footprint with matching hit geometry and palette proportions. -->
<!-- PFC_GROUP3_INVERTER_NATIVE_RESULT_CLEAN_20260921: Removed the late/generic inverter LF display dependency. A native inverter result resolver now reads dcInverterFlowMap with solved-runtime fallback and the canvas draws the inverter LF block directly whenever Load Flow is active. -->
<!-- PFC_DC_CONVERTER_UPS_FOOTPRINT_20260921: Charger/rectifier, DC-DC converter, and DC/AC inverter use the same 42x50 equipment body and ±29 terminal spacing as the AC UPS for clean, consistent symbol/text layout. -->
<!-- PFC_GROUP3_PV_BESS_INVERTER_20260921: Added PV array availability/MPPT model and dual-mode DC/AC inverter. Grid-forming preserves island-source behavior; grid-following joins the AC network as PQ/PV controlled DER with unity/fixed-PF/fixed-Q/voltage-regulation modes, kVA/current capability enforcement, Q-limit PV-to-PQ switching, reverse power flow, curtailment, and Group 3 regressions. -->
<!-- PFC_GROUP1_COMMON_CONVERTER_CORE_20260921: Unified steady-state converter evaluator now owns AC/DC power balance, efficiency, P/Q/S/current conversion, forward/reverse transfer semantics, equipment rating/current-limit checks, operating state, and numerical power-balance audit for VFD, UPS, charger/rectifier, DC-DC converter, and DC/AC inverter load-flow models. Existing network topology and AC Newton-Raphson architecture are preserved. -->
<!-- PFC_DC_ULF_NATIVE_CLEAN_20260920: removed late ULF presentation overrides; native phase-voltage/current renderer is authoritative. DC Results routing now dispatches each DC mode to its native result view. -->
<!-- PFC_DC_RESULT_HIGHER_V4_20260920: default DC cable operating-result block moved two additional 7px text spaces upward; manual user positions are preserved. -->
<!-- PFC_NATIVE_DATABLOCK_TEXT_DRAG_FIX_20260919: corrected object data-block stacked-index drag anchor; hit-test returns actual display index; no new canvas wrapper/listener. -->
<!-- PFC_MODULES_NATIVE_CLEAN_20260919: calculation-study cleanup. Grounding/Conduit/Cost remain native; Harmonics/ULF post-processing is merged into the core; Generator Sizing optimizer/frequency layers are consolidated into one module script. Superseded calculation-module wrapper scripts removed. -->
<!-- PFC_GROUNDING_SERVICE_ELECTRODE_GEC_20260919: consolidated native grounding/bonding engine; service/SDS ownership, electrode modeling, EGC/GEC/MBJ/SBJ/SSBJ sizing, right-click designations, and one-line results are implemented without superseded grounding wrappers. -->

<!-- PFC_TIGHT_SELECTION_BUS_PRIORITY_20260918: tighter equipment hit boxes; bus/node sweet-spot gets selection priority near terminals. -->
<!-- PFC_RELIABILITY_TOPOLOGY_NATIVE_DIRECT_FIX_20260917: topology button calls native analyzer directly; no wrapper dependency. -->
<!-- PFC_SHIFT_REPEAT_PLACEMENT_20260918: hold Shift while placing to repeatedly drop the selected palette element; releasing Shift returns to Select after repeat mode is active. Feeder/direct-connection completion also supports Shift-repeat. -->
<!-- PFC_RELIABILITY_NATIVE_UI_CLEAN_20260917: removed duplicate Reliability dialog override; one authoritative native Reliability UI exposes Identify Topology + Calculate Reliability. -->

<!-- PFC_AHF_CLOSED_LOOP_CONVERGENCE_STATUS_SEPARATION_20260915 -->

<!-- PFC_ULF_RIGHT_LANE_STUDY_STATUS_STACK_20260913: ULF feeder results share the LF right-side result lane; top-right canvas status follows only the active study; top-right overlays stack below status without overlap. -->
<!-- PFC_HIDDEN_RELEASE_VALIDATION_COMMAND_20260912: customer UI hides release validation; type validate on the canvas/app chrome to open the internal offline release-validation center. -->
<!-- PFC_GENSIZE_IEEE_INDUSTRY_VALIDATION_20260914: Native generator-sizing validation distinguishes IEEE study-method checks from manufacturer/project-dependent criteria; frequency/load-step/site/nonlinear items remain REVIEW unless product-specific data are supplied. -->
<!-- PFC_GENSIZE_CLEAN_CORE_MOVABLE_TEXT_20260912: consolidated GenSize core run; validation decoupled from calculation; repaired GenSize/MS text hit-testing so native one-line result blocks are draggable. -->
<!-- PFC_MS_MOVABLE_ORANGE_DATABLOCKS_20260910: MS motor result blocks and GenSize starter annotations are independently movable native 7pt orange result text. -->
<!-- PFC_GENSIZE_ORANGE_NATIVE_DATABLOCK_20260910: GenSize one-line uses native result renderer; orange study text; Run Load / Cont Req / Start Req semantics. -->
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<!-- PFC_2W_TRANSFORMER_OVERLAPPING_CIRCLES_20260913: Transformer 2W palette/professional icon uses two overlapping circles to match the 3W three-circle visual language; electrical model and one-line solver symbol unchanged. -->
<!-- PFC_AHF_RMS_THDI_RESULT_FIX_20260914: Correct total AHF RMS output and connected-bus THDi before/after/target reporting across one-line, results, comparison, and report. -->
<!-- PFC_AHF_TRACEABLE_SIZE_ONELINE_20260914: AHF one-line annotation shows calculated minimum/suggested standard/installed amp rating; harmonic results include per-order compensation terms and explicit RSS sizing equations. -->
<!-- PFC_ULF_PHASE_VOLTAGE_CURRENT_ADJACENT_20260920: ULF bus one-line and results place Va/Vb/Vc directly beside Ia/Ib/Ic, with voltage/current unbalance plus avg LL pu and delta-V summary. Display-only; solver unchanged. -->
<!-- PFC_DC_VALIDATION_SUITE_20260920: DC feeder result draw/hit/drag geometry unified; expanded IEEE/analytical DC regression suite; rectifier energy-balance helper and Master Gate integration. -->
<!-- PFC_DC_CABLE_RESULT_MOVABLE_V2_20260920: visible/pinned DC cable operating-result text uses matching draw/hit geometry and enlarged hit padding; selectable and independently draggable whenever displayed. -->
<!-- PFC_ACDC_RECTIFIER_AUTO_COUPLING_20260920: DC LF rectifier source share automatically becomes AC-input PQ demand using efficiency and input PF; AC/DC networks remain domain-separated. -->
<!-- PFC_ACDC_RECTIFIER_DC_GRAPH_BOUNDARY_FIX_20260920: pure-DC component traversal stops at rectifier AC IN; only DC OUT participates in DC load flow, allowing normal LF to derive the rectifier AC equivalent from downstream DC demand. -->
<!-- PFC_DC_TARGET_ONELINE_TRACEABLE_20260914: DC one-line displays governing design targets (Vmin, runtime, Ah, cable drop) with PASS/FAIL from authoritative DC analysis; results include explicit target equations. -->
<!-- PFC_GEN_SELECTION_PERSIST_DC_TARGET_MOVABLE_20260914: applying a generator preserves the target generator as the active one-line selection; DC target result block is native selectable/draggable text with persistent object-relative offsets. -->
<!-- PFC_GEN_MS_TARGETS_ONELINE_20260914: Generator Sizing and Motor Starting show authoritative target-vs-actual PASS/FAIL blocks on the one-line and traceable result checks. -->
<!-- PFC_GENSIZE_EXPLICIT_SELECTED_CANDIDATE_20260914: GenSize recommendation is advisory only; selected/applied candidate persists and is the authoritative target/evaluation candidate. No row-0/minimum-PASS fallback is allowed for Apply or target validation. -->
<!-- PFC_AHF_RECOMMENDED_SIZE_ONELINE_20260916: compact AHF harmonic annotation now shows calculated minimum and next-standard preliminary recommended ampere rating. -->
<!-- PFC_LICENSE_NATIVE_ENTRY_CLEAN_20260916: licensing gates consolidated into authoritative study entry functions; late study wrappers removed. -->
<!-- PFC_AHF_DESIGN_MARGIN_20260916: AHF sizing adds configurable design margin (default 20%); one-line shows MIN + margin = DESIGN and REC standard rating. -->
<!-- PFC_AHF_MIN_AMPS_NOWRAP_20260916: AHF harmonic one-line sizing keeps REC and MIN ampere values on one explicit row; generic result wrapping no longer splits MIN to a second level. -->
<!-- PFC_RELIABILITY_TOPOLOGY_BUTTONS_AUDITED_20260917: authoritative Reliability dialog now exposes Identify Topology + Calculate Reliability; results show traceable event-by-event outage calculation. -->
<!-- PFC_DC_FEEDER_RESULT_GRAB_PRIORITY_V4_20260920: DC cable result hit-test moved to first priority and default vertical offset raised further above feeder. -->
<!-- PFC_AHF_4ISSUE_HARDGATE_20260923: independent UH AHF control, active PF LF/ULF compensation, effect classification, CT validation. -->
<!-- PFC_LIGHTNING_DUCTBANK_COUPLING_20260924: Underground duct-bank geometry, shielding/bonding, magnetic/electric/GPR screening components, full-network propagation. -->
<!-- PFC_LF_ULF_RESULT_FIX_20260924: balanced LF load percent uses solved duty/nameplate rating; ULF transformer and utility result ownership repaired so compact/engineering/detailed one-line blocks use actual phase currents instead of zero-filled placeholders. -->
<!-- PFC_UH_RESULTS_ALWAYS_VISIBLE_20260924: seed bus/feeder UH records from fresh ULF even with zero harmonic orders; normalize UH display settings on import/run. -->
<html data-build-fingerprint="775aca300e627ca12cb1568269cd5b9d1a9702f14d8b79f25614bc5f20e5420e" data-controlled-release="PASS" data-release-id="PFC-MASTER-1.02" data-regression-integrity="86A5FC18" data-library-freeze-integrity="DFD4EB90" data-master-baseline="PowerFlowCheck Critical 1.02 — QuickCalc" lang="en">
<head>
<!-- PFC_IN_OUT_SERVICE_SHORTCUTS_20260915: typed in/out applies native service status to highlighted single/multiple objects/feeders -->
<!-- PFC_CONTEXT_SERVICE_CHECKMARKS_20260916: right-click Status always shows In Service / Out of Service with live current-state checkmark -->
<!-- PFC_PROPERTIES_SERVICE_STATUS_TOP_20260916: prominent top-of-Properties In/Out Service selector synchronized with context menu and typed commands -->
<!-- PFC_AHF_IN_OUT_SELECTION_FIX_20260916: equipment hit-test takes priority over overlapping auto-nodes; IN/OUT also resolves selected owner text. -->
<!-- PFC_MODEL_INTEGRITY_20260916: Audit-hub + typed check validates topology, ratings, PCC/AHF sensing, source strength, voltage continuity, and active-source islands. IN/OUT commands require an explicit current selection. -->
<!-- PFC_TRANSFORMER_CONNECTION_ID_20260915: derived D/Y/YG/YHRG transformer connection ID shown on one-line and properties; no duplicate manual field -->
<!-- PFC_TRANSFORMER_PHASE_SHIFT_HARMONIC_CANCELLATION_20260915: sequence-aware transformer phase displacement and local harmonic source phase reference for multipulse cancellation -->
<!-- PFC_AHF_ONELINE_SIZE_VISIBILITY_FIX_20260914: AHF activeFilterMap is finalized after core harmonic solve; display synchronization now reruns afterward so calculated AHF minimum/standard/installed sizing appears immediately on the one-line. -->
<!-- PFC_TEXT_OWNER_HIGHLIGHT_AND_LOWER_RIGHT_INFO_20260913: text selections highlight owning object/feeder; load/panel/switchboard/motor/MCC automatic information defaults below-right. -->
<!-- PFC_AUTHORITATIVE_LOAD_INPUT_BASIS_20260912: load/motor/distribution input basis controls editable fields; all non-selected electrical quantities are derived, grayed, synchronized on Apply, and reflected on the one-line. -->

<!-- PFC_SKM_CABLE_DEFAULT_20260912: new feeders default to SKM_CU_THHN_MAG, Copper THHN in magnetic/steel conduit; existing saved feeder selections remain unchanged. -->

<!-- PFC_HIDDEN_RELEASE_VALIDATION_ONLY_20260912: customer ribbon/button removed; Offline Release Validation is accessible only by typing validate outside input fields. -->

<!-- PFC_HARDCODED_RELEASE_ASSERTIONS_20260912: SELF-LIB-001 and SELF-MASTER-001 are deterministic embedded release-baseline assertions; they do not read browser storage or mutable runtime library state. -->

<!-- PFC_SHORTCUT_TABLE_20260914: complete persistent ribbon + equipment shortcut coverage; max = Max Window / Restore; shortcut or ? opens structured table. -->

<!-- PFC_VALIDATION_STATELESS_20260912: PASS/HOLD evaluation uses only fresh current-session execution and embedded benchmark/library references; browser storage is excluded from validation decisions. -->

<!-- PFC_GENSIZE_RUN_VALIDATION_DECOUPLE_FIX_20260911: core GenSize results commit before validation; validation errors cannot leave the app showing only internal Load Flow. -->

<!-- PFC_GENSIZE_VISIBLE_CALCULATION_EQUATIONS_20260911: GenSize results show traceable running, continuous kW/kVA, nonlinear allowance, and governing starting equations without restoring the removed result table. -->
<!-- PFC_101_MS_GENSIZE_102_PORT_NO_RESULT_TABLES_20260911: ports 1.02 Motor Starting and Generator Sizing functionality into 1.02 while replacing result tables with compact cards/graph summaries; reports retain engineering tables. -->
<!-- PFC_GENSIZE_MANUFACTURER_SKVA_TABLE_20260910: replaced legacy generic generator candidate table with supplied running kW/kVA + published starting skVA/dip catalog; sizing now screens manufacturer starting capability. -->

<!-- PFC_RELEASE_REGISTER_CLEAN_FIX_V5_20260909: edition-scoped release registers; embedded regression/freeze reissued for this release; stale shared register cleanup added. -->
<!-- PFC_WRAPPER_NATIVE_CLEAN_20260919: guarded global registration; duplicate release-identity shim removed; redundant identity timers removed. No study calculation algorithms changed. -->
<!-- PFC_RELEASE_HOLD_FIX_V4_20260909: removed unconditional HOLD reset and repaired edition promotion identity. -->
<!-- PFC_EDITION_REPAIR_V2_20260909: PowerFlowCheck Master; fixes prior recursive MutationObserver lockup and Master identity override. -->
<!-- PFC_RELEASE_LIBRARY_BASELINE_ISOLATION_FIX_20260909: packaged built-in library freeze is authoritative; browser-local/user-project library records cannot invalidate release integrity. -->

<!-- PFC_MOTOR_START_REPORT_GRAPHS_20260908: report includes speed, current, voltage, torque-speed, accelerating-torque graphs and key curve values from stored solver traces. -->
<!-- PFC_LF011_BATTERY_SOURCE_VISUAL_STATE_FIX_20260907: LF-011 utility source is out of service in Battery mode; battery and UPS remain in service. -->
<!-- PFC_AHF_MITIGATION_COMPARE_20260913: Active harmonic filter modeled as controlled harmonic current injection with RMS rating limiter; Baseline/Passive/Active/Hybrid comparison added to Harmonics. -->
<!-- PFC_AHF_REALWORLD_CONTROLS_FIXED_20260914: Real-world AHF specification/commissioning controls re-applied from clean working build; core startup functions preserved. -->
<!-- PFC_AHF_EFFECT_COMPARE_FIX_20260914: runtime AHF current source is explicitly admitted to harmonic source list; installed amp basis includes parallel units; unavailable mitigation scenarios are not synthesized. -->
<!-- PFC_AHF_NATIVE_CLEAN_TARGET_RATING_20260914: consolidated AHF/Harmonics execution into one native orchestration path; removed late AHF and harmonic-run wrappers; Compare Mitigation rebuilt; target and suggested standard AHF ratings calculated from solved harmonic target requirement. -->
<!-- PFC_DC_BATTERY_MODE_VISUAL_PATH_20260913: active DC study renders Battery -> UPS inverter/output -> supported load energized; UPS AC input/utility side remains de-energized/gray. -->
<!-- PFC_DC_RECTIFIER_DUAL_DOMAIN_TERMINALS_20260920: Charger/rectifier is a true two-terminal conversion boundary: AC input terminal and DC output terminal; connection validation prevents AC/DC cross-domain bus attachment. -->
<!-- PFC_DCDC_INVERTER_COUPLED_LF_20260921: DC-DC converters now reflect downstream DC demand through efficiency; DC/AC inverters create solved AC output source islands and reflect solved AC demand to their DC input. Physical DC converter input/output connections are stamped with kW/A flow for LF display. -->
<!-- PFC_BATTERY_CHARGER_COUPLED_LF_20260921: Charger/rectifier battery-recharge demand is calculated from connected battery SOC/Ah/recharge time or fixed charge current, reflected to AC input through efficiency/PF, and stamped on AC-input, DC-output, and battery-charge connections for one-line LF behavior. -->
<!-- PFC_DC_AC_VISUAL_LANGUAGE_ICONS_20260920: DC palette + one-line symbols reuse AC equipment geometry with explicit D/DC badges; rectifier shows AC IN -> DC OUT, DC-DC shows DC IN -> DC OUT, inverter shows DC IN -> AC OUT. -->

<!-- PFC_VALIDATE_SINGLE_CONTROLLER_20260907: prior layered Validate patches removed; one edition-aware controller owns the ribbon and modal controls. -->

<!-- MCC_SWITCHBOARD_PROPERTY_PARITY_AND_UI_RUNTIME_FIX_2026: MCC now uses the switchboard distribution-assembly property/rated-bus ownership model, remains white/not separately evaluated, and unified result typography enforcement no longer throws scope errors. -->

<!-- FIXED_RESULT_TEXT_AND_PANEL_SWBD_BUS_TOGGLE_2026: unified study-result typography retained at fixed original coordinates; panelboard/switchboard rated hosted buses can display as Node Dot or Bus Line without changing electrical duty ownership. -->

<!-- PFC_HARMONICS_KCL_VALIDATION_HARDENING_2026: explicit bus KCL audit, safe THDi denominator, bus current field parity, HAR-BUS-001..015 permanent regression. -->
<!-- ULF_REACTIVE_ONLY_PARITY_FIX_2026: ULF now includes reactive-only shunt devices such as capacitors/passive filters even when real power is zero; preserves sign so capacitive kvar reduces upstream reactive demand. -->

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<!-- PFC_PASSIVE_FILTER_DESIGN_EXISTING_20260916 -->
<!-- PFC_AHF_PCC_SENSE_INJECTION_RELEASE_CANDIDATE_20260915 -->
<title>PowerFlowCheck Critical 1.02 — QuickCalc</title>
<!-- PFC_RELEASE_DEFECT_FIX_2026: ULF reverse-flow PF sign normalization + harmonic bus RMS KCL reconciliation; release regression extended. -->
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<!-- Core studies and one-line visibility policy -->
<!-- UTILITY_LF_THEVENIN_2026: SKM-style utility positive-sequence Thevenin source uses an internal slack behind series Z; the physical utility terminal is PQ/passive and is not re-clamped as a PV bus. SC source stamping remains unchanged. -->
<!-- SC_SOURCE_METHOD_CONSISTENCY_AUDIT_2026: one-line display + solver + results use active utility sourceMethod only; stale inactive-method fallback removed -->
<!-- AUTOSIZE_CORE_MODULE_AUDIT_2026: Auto Size moved into Studies; same study icon/text styling; empty Design group removed -->
<!-- TEXT_BLOCK_UX_AUDIT_2026: unified 7pt defaults; measured metrics; auto-stacked results; GB+Conduit Text Layout coverage -->
<!-- GENERATOR_SIZING_9P8_FULL_NETWORK_AUDIT_2026: source-LF basis; no aggregate double count; full-network candidate substitution; dynamic motor/fire-pump; swing/governor recovery; selectable apply -->
<!-- PFC_GENSIZE_NATIVE_CLEANUP_20260910: native calculation/result/report/one-line layer; starter methods shown for all in-service motors during MS and Gen Size; no late wrappers. -->
<!-- PFC_GENSIZE_LOAD_STEP_PROFILE_20260910: GenSize results and engineering report include a sequence-derived running/transient kVA graph plus traceable load-step table and governing-step summary. -->
<!-- PFC_REPORT_REMOVE_MFR_PASSFAIL_20260910: report presents manufacturer starting data as reference values without manufacturer-specific PASS/FAIL verdicts; sizing logic remains unchanged. -->
<!-- PFC_GENSIZE_AUTHORITATIVE_SKVA_GATES_20260910: manufacturer published starting skVA is the primary alternator-starting gate when available; generic Xd'' voltage dip is advisory REVIEW/PASS in that case; candidate output uses explicit PASS/REVIEW/FAIL gates and governing reason. -->
<!-- LOAD_EDITING_RIGHTCLICK_AUDIT_2026: full load properties + generator sequence + context actions -->
<!-- THREE_WINDING_ZERO_STAR_LIMIT_2026: zero derived star leg accepted as limiting case; negative legs remain errors; LF/SC retain entered pairwise data and use established near-zero numerical stamping -->
<!-- IEEE3002_CONVERGENCE_FIX_2026: true zero-star topology contraction + multiple-utility voltage-controlled LF bus treatment; regression hardened -->
<!-- IEEE3002_SC_ZERO_STAR_FIX_2026: SC contracts same-voltage zero 3W star legs before sequence Y-bus; cross-voltage zero legs are explicitly rejected pending ideal-transformer reduction -->
<!-- SC_BUS_MAPPING_KV_DIAGNOSTIC_FIX_2026: resumable SC busAudit now records physical bus nominal kV with solver-node vbase fallback -->
<!-- SC_TOPOLOGY_SOURCE_CONTRIBUTION_AUDIT_2026: per-source positive-sequence fault contribution + physical impedance/zero-Z topology inventory -->
<!-- SC_CONTRIBUTION_ONELINE_2026: dominant feeder contribution arrows + kA labels; modal contribution tables removed -->
<!-- SC_CONTRIBUTION_MOVABLE_LABELS_2026: contribution labels offset clear of conductors and individually draggable; arrows remain path-anchored -->
<!-- SC_ALL_FAULT_BRANCH_CONTRIBUTIONS_2026: full sequence branch-current audit for 3PH/LG/SLG/LL/LLG/LLLG; complete internal branch dataset, selectable feeder overlay -->
<!-- SC_MOVABLE_ANNOTATION_2026: contribution arrow + text move as one annotation; no opaque text background -->
<!-- SC_CONNECTED_BRANCH_CONTRIBUTIONS_2026: one-line overlay now shows every contribution on each physical branch directly connected to the selected bus -->
<!-- LF_DIRECTION_ARROW_OVERLAY_2026: subtle solved real-power-flow arrows on energized feeders -->
<!-- LF_DIRECTION_ARROW_VISIBILITY_FIX_2026: arrows enlarged, offset from conductor, opacity increased for reliable visibility -->
<!-- LF_DIRECTION_ARROW_FOLLOWS_RESULT_2026: LF arrow is anchored to the movable feeder LF result block rather than the conductor midpoint -->
<!-- LF_DIRECTION_ARROW_VALIDATED_2026: flow lookup corrected to production lfResults.branchMap.fromPMW/pMW; forward/reverse regression checked -->
<!-- LF_DIRECTION_GEOMETRY_VALIDATED_2026: arrow orientation now follows feeder.from→feeder.to geometry for positive fromPMW and reverses for negative flow -->
<!-- CABLE_ENDPOINT_DISCONNECT_RECONNECT_2026: From/To end state in Properties + right-click; loose open-circle endpoint drag/reconnect; disconnected cables excluded from studies -->
<!-- LF_ARROW_AHEAD_OF_RESULT_2026: LF arrow is placed on the leading side of the movable result block in the solved flow direction -->
<!-- BREAKER_DIRECT_CABLE_ENDPOINT_2026: physical cables connect directly to breaker terminals; legacy synthetic breaker auto-nodes are collapsed on project load/study repair -->
<!-- INTEGRAL_BUS_AUTO_NAMING_2026: hosted buses for panel/switchboard/switchgear/MCC default to B-{equipment name}; explicit Node Bus IDs remain authoritative -->
<!-- BREAKER_AIC_EQ_EVAL_2026: breaker AIC resolves applicable terminal-bus SC duty, uses highest valid 3PH candidate, records governing basis; EQ status annotations are independently draggable -->
<!-- EQUIPMENT_EVALUATION_CORE_STUDY_2026: non-destructive equipment adequacy evaluation using fresh LF/3PH SC; compact one-line status plus detailed results/report -->
<!-- ANY_DEVICE_BUS_HOSTING_2026: Properties Hosted/Non-hosted for any directly bus-connected device with perpendicular bus lock and along-bus drag constraint -->
<!-- AUTOSIZE_MANUAL_LOCK_MIGRATION_2026: Auto Size enabled by default; only explicit Manual selections lock equipment; legacy automatic locks are repaired -->
<!-- DEFAULT_QUICK_TEST_LOADS_2026: panel/switchboard/switchgear/MCC start with 100 kW at 0.90 PF for immediate LF verification; starter load auto-suppresses when downstream demand exists and converts to user load when edited -->
<!-- LOAD_ONLY_DISTRIBUTION_RATED_BUS_2026: panel/switchboard/switchgear/MCC use the same distribution-assembly model; their auto-created bus owns continuous + short-time/momentary ratings and is the Equipment Evaluation / Auto Size duty location. Legacy duplicated ratings migrate one-way to the bus. -->
<!-- EQ_LOAD_WHITE_AUTOSIZE_BULK_2026: load-only panel/switchboard/switchgear/MCC/motor/load remain white and excluded from Equipment Evaluation; legend identifies white load status; Auto Size recommendations provide Apply/Lock Check All + Uncheck All controls. -->
<!-- PFC_BASE_BUILD_2026: unrestricted master/base build; no 30-day expiration or runtime study lockout. -->
<!-- ULF_EQ_AS_CURRENT_BASIS_2026: Equipment Evaluation and Auto Size support Auto / Balanced LF / Unbalanced LF current basis; ULF uses governing max phase current with phase traceability and revision freshness. -->
<!-- RATED_AUTO_BUS_DISPLAY_2026: panel/switchboard rated hosted buses may display as Node Dot or Bus Line without changing electrical participation; switchgear rated hosted buses remain mandatory Bus Lines. -->
<!-- BUS_AUTOSIZE_DEFAULT_MARGIN_FIX_2026: Load Factor defaults to 1.0 multiplier; Spare Capacity and Load Growth default to 0% -->
<!-- AUTOSIZE_DEFAULTS_UNCHECKED_2026: Load Factor 1.0, Growth/Spare 0%; equipment default unselected; Check All/Uncheck All + no-selection guard -->
<!-- IEEE_JSON_CASE_REPLACEMENT_2026: IEEE 14/30/57/118/300 loadable validation cases replaced with exact user-supplied PowerFlowCheck schemaVersion 68 JSON projects; coordinates/layout/equipment/feeders/settings preserved. -->
<!-- IEEE_VALIDATION_POSTERS_UPDATED_2026: IEEE validation preview/poster images now match the embedded JSON project layouts for 14/30/57/118/300 bus cases. -->
<!-- IEEE_VALIDATION_EXACT_REPAIR_2026: IEEE 30/57/118/300 electrical layers rebuilt from exact embedded IEEE/MATPOWER reference builder; supplied drawing coordinates preserved; full regression PASS. -->
<!-- DISTRIBUTION_LOAD_SCHEDULE_2026: panel/switchboard/switchgear schedule editor with circuit/feeder rows, load category, phase assignment, per-row demand factor, balanced-LF aggregation, phase summaries, and print-ready schedule. -->
<!-- SCHEDULE_APPLY_RECONCILIATION_2026: Apply Schedule writes demand-adjusted schedule totals back to the equipment aggregate load fields (kW/kVA/kvar/PF/current), replacing starter/manual load while retaining the schedule as the LF source. New distribution palette item is Switchboard; legacy switchgear objects remain readable. -->
<!-- SINGLE_PHASE_ULF_MS_2026: Loads and motors support 3Φ and explicit 1Φ A-N/B-N/C-N/A-B/B-C/C-A; ULF uses exact conductor current injection; Motor Start uses connection-aware current/voltage with explicit unsupported-starter guards. -->
<!-- RESULT_ELEMENT_RED_LINK_2026: clicking study-result text outlines its associated bus/feeder/equipment in system-tree red; clicking an element outlines its active study result block in matching red. -->
<!-- ULF_PROFESSIONAL_ALIGNED_2026: ULF one-line annotations use fixed-width aligned A/B/C/N voltage/current columns, unbalance metrics and governing phase; display-only change. -->
<!-- ULF_PHASE_DOMAIN_RADIAL_2026: separate Unbalanced Load Flow module. Radial phase-domain forward/backward sweep uses schedule A/B/C assignments, balanced fallback loads, feeder R1/X1, transformer ratios/impedance, phase/neutral currents, voltage/current unbalance, and explicit meshed-island rejection. -->
<!-- LOAD_SCHEDULE_CANVAS_POPUP_FIX_2026: schedule actions exposed to Properties UI; draggable modeless editor centered within one-line canvas -->
<!-- PANEL_SCHEDULE_MIRROR_BREAKER_POLES_2026: odd side mirrors even; circuit numbers at center; breaker A + explicit 1P/2P/3P saved and printed -->
<!-- PANEL_MULTIPOLE_BREAKER_SPAN_2026: 2P/3P panel breakers consume downstream same-side circuit positions; covered circuits locked and phase assignment derived from panel position. -->
<!-- CRISP_MODAL_TABLE_RENDERING_2026: floating dialogs pixel-snapped; compositor hint removed; result tables use sharper typography/borders. -->
<!-- PFC_EDITION_AWARE_CORE006_2026: live Core Platform identity regression validates each packaged 1.02 edition against its own release ID/title. -->
<!-- PFC_CORE_GATE_PROMOTION_IDENTITY_FIX_2026: CORE-006 accepts validated RC3 candidate identity or promoted 1.02 RELEASE BASELINE identity; promotion no longer causes false Core FAIL. -->
<!-- RIBBON_AUDIT_CORE_GROUP_UNGROUP_FIX_2026: manager filters unavailable edition commands; ULF visibility managed; Core includes Group/Ungroup; first-click group drag; internal feeders grouped; ungroup preserves member selection. -->
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<!-- PFC_FINAL_VALIDATED_RELEASE_2026: ULF PF direction and harmonic bus RMS reconciliation closed; suite 2.8.0; Master regression 87 PASS / 0 FAIL / 0 REVIEW. -->
<!-- PFC_REPORT_FIX_2026: added ULF + Voltage Check reporting, Master 1.02 report/schedule branding, and wide Equipment Evaluation report layout. -->
<!-- PFC_ULF_LOAD_TERMINAL_PHASE_CURRENT_FIX_20260924: load/motor ULF A/B/C/N and MAX use one authoritative load-terminal current reconstructed from solved phase voltages and native load model; solver unchanged. -->

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<!-- MCC_SCHEDULE_PROPERTIES_2026: MCC Properties includes editable/printable feeder/load schedule; schedule demand drives balanced LF and phase assignments feed ULF; saved in project loadSchedule -->
<!-- PFC_UH_NET_SCOPE_TRANSFORMER_FIX_20260926: Removed obsolete post-island transformer finalization that referenced block-scoped net after the island loop. The following global transformer finalizer is authoritative. -->
<!-- PFC_UH_TRANSFORMER_DATABLOCK_WRAPPER_FIX_20260926: Compact UH renderer now reads nested transformer primary/secondary/tertiary winding RMS and THDi records instead of flat equipment fields; transformer2w/3w are recognized by shared engineering-result wrappers. -->
<!-- PFC_UH_TRANSFORMER_FUNDAMENTAL_FIELD_CASE_FIX_20260926: UH transformer fundamental reconciliation now reads ULF fields Ia/Ib/Ic and fromIa/fromIb/fromIc/toIa/toIb/toIc with the correct field casing. This prevents transformer total RMS from collapsing to harmonic-only RMS and restores winding THDi/current parity with the terminal buses. -->
<body><button id="maxWindowRestore" type="button" onclick="return window.__oneLineMaxWindow(false,event)" title="Restore the normal application layout (Esc)">Restore Window</button><div class="app">
<div class="ribbon" aria-label="PowerFlowCheck Master ribbon">
 <div class="group" aria-label="View" title="View"><button class="tool active" data-mode="select"><div class="ico">↖</div>Select</button><button class="tool" data-mode="pan"><div class="ico">✥</div>Pan</button><button class="tool" id="zoomIn"><div class="ico">＋</div>Zoom In</button><button class="tool" id="zoomOut"><div class="ico">−</div>Zoom Out</button><button class="tool" id="zoomFit"><div class="ico">□</div>Zoom Fit</button><button class="tool" id="maxWindowBtn" type="button" onclick="return window.__oneLineMaxWindow(undefined,event)" title="Use the entire screen while keeping all application controls visible"><div class="ico">▣</div><span id="maxWindowLabel">Max Window</span></button><button class="tool" id="systemTreeBtn"><div class="ico">☷</div>System Tree</button><button class="tool hub" id="themeBtn" title="Toggle dark user interface"><div class="ico" id="themeIco">◐</div><span id="themeLabel">Dark</span></button><button class="tool hub" id="ribbonGroupsBtn" title="Show or hide ribbon groups and study commands" data-ribbon-manager="1"><div class="ico">▤</div>Ribbon</button><button class="tool hub" id="resultsOnlyBtn" type="button" title="Hide ID + ratings/nameplate values and show study results only"><div class="ico">RO</div><span id="resultsOnlyLabel">Results Only</span></button><button class="tool hub" id="textLayoutPresetBtn" type="button" title="Apply annotation layout to the current one-line"><div class="ico">T</div><span>Text Layout</span></button></div>
 <div class="group" aria-label="Edit" title="Edit"><button class="tool" id="undo"><div class="ico">↶</div>Undo</button><button class="tool" id="redo"><div class="ico">↷</div>Redo</button><button class="tool" id="copyBtn" title="Clone the current single or window selection"><div class="ico">⧉</div>Clone</button><button class="tool" id="pasteBtn" title="Paste the cloned topology"><div class="ico">▣</div>Paste Clone</button><button class="tool" id="del"><div class="ico">⌫</div>Delete</button></div>
 <div class="group" aria-label="Arrange" title="Arrange"><button class="tool" id="groupBtn"><div class="ico">⊞</div>Group</button><button class="tool" id="ungroupBtn"><div class="ico">⊟</div>Ungroup</button><button class="tool" id="gridToggle"><div class="ico">▦</div>Grid</button><button class="tool" id="snapToggle"><div class="ico">⌗</div>Snap</button></div>
 <div class="group" aria-label="Studies" title="Studies"><button class="tool study" id="lfBtn"><div class="ico">LF</div>Load Flow</button><button class="tool study" id="ulfBtn" title="Phase-domain unbalanced load flow — radial and meshed networks"><div class="ico">ULF</div>Unbalanced LF</button><button class="tool study" id="scBtn"><div class="ico">SC</div>Short Circuit</button><button class="tool study" id="harBtn"><div class="ico">H</div>Harmonics</button><button class="tool study" id="uhBtn" title="A/B/C/N unbalanced harmonics using fresh ULF results"><div class="ico">UH</div>Unbal Harm</button><button class="tool study" id="ltgBtn" title="Lightning / surge transient analysis"><div class="ico">⚡</div>Lightning</button><button class="tool study" id="mstartBtn"><div class="ico">MS</div>Motor Start</button><button class="tool study" id="dcBtn"><div class="ico">DC</div>DC</button><button class="tool study" id="conduitBtn" title="Conduit fill, raceway sizing and jam screening"><div class="ico">CON</div>Conduit</button><button class="tool study" id="costBtn" title="Offline rough-order-of-magnitude quantity takeoff and cost estimate"><div class="ico">$</div>Cost ROM</button><button class="tool study" id="groundBtn" title="Grounding and bonding conductor sizing"><div class="ico">GND</div>Ground</button><button class="tool study" id="relBtn"><div class="ico">REL</div>Reliability</button><button class="tool study" id="autoSizeBtn" title="Comprehensive primary equipment sizing"><div class="ico">AS</div>Auto Size</button><button class="tool study" id="eqEvalBtn" title="Evaluate entered equipment ratings against calculated load and fault duty"><div class="ico">EQ</div>Equip Eval</button><button class="tool study" id="voltageCheckBtn" title="Color-code the one-line by nominal voltage class"><div class="ico">VC</div>Voltage</button><button class="tool study" id="genSizeBtn" title="Generator sizing, load steps, motor starting and manufacturer candidate screening"><div class="ico">GEN</div>Gen Size</button></div>
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<aside class="panel left"><div class="ptitle">EQUIPMENT</div><div class="library">
<div class="librarySection"><span>AC / GENERAL ELEMENTS</span><span class="sectionTag">AC</span></div><button class="equip" data-type="utility"><div class="sym"><svg viewBox="0 0 56 60" width="34" height="28" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="2" stroke-linecap="round" stroke-linejoin="round"><path d="M28 2 V9"/><circle cx="28" cy="30" r="19"/><path d="M28 49 V58"/><path d="M17 35 Q23 23 28 30 Q34 37 39 25"/></g></svg></div>Utility</button><button class="equip" data-type="generator"><div class="sym">ⓖ</div>Generator</button><button class="equip" data-type="transformer2w" title="Two-winding transformer"><div class="sym"><svg viewBox="0 0 48 60" width="46" height="27" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="1.8" stroke-linecap="round" stroke-linejoin="round"><circle cx="24" cy="22" r="13"/><circle cx="24" cy="38" r="13"/><path d="M24 2 V9"/><path d="M24 51 V58"/></g></svg></div>Transformer 2W</button><button class="equip" data-type="transformer3w" title="Three-winding / tertiary transformer"><div class="sym"><svg viewBox="0 0 72 60" width="48" height="27" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="1.8" stroke-linecap="round" stroke-linejoin="round"><path d="M36 2 V12"/><path d="M4 14 Q12 26 20 14 Q28 26 36 14 Q44 26 52 14 Q60 26 68 14"/><path d="M4 46 Q12 34 20 46 Q28 34 36 46"/><path d="M40 46 Q48 34 56 46 Q64 34 72 46"/></g></svg></div>Transformer 3W</button><button class="equip" data-type="bus"><div class="sym">━━━━</div>Bus</button><button class="equip" data-type="breaker"><div class="sym"><svg viewBox="0 0 40 60" width="28" height="28" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="2" stroke-linecap="round" stroke-linejoin="round"><path d="M13 2 V23"/><path d="M13 37 V58"/><path d="M13 23 C19 23 20 27 20 30 C20 33 19 37 13 37"/></g></svg></div>Breaker</button><button class="equip" data-type="disconnect"><div class="sym">—/—</div>Disconnect</button><button class="equip" data-type="panel"><div class="sym">▭</div>Panel</button><button class="equip" data-type="switchboard"><div class="sym">▯</div>Switchboard</button><button class="equip" data-type="mcc"><div class="sym">▱</div>MCC</button><button class="equip" data-type="motor"><div class="sym">ⓜ</div>Motor</button><button class="equip" data-type="vfd"><div class="sym" style="font-size:11px;line-height:10px">IN<br>VFD<br>OUT</div>VFD</button><button class="equip" data-type="capacitor"><div class="sym" style="font-size:15px">─| |─</div>Capacitor</button><button class="equip" data-type="passivefilter" title="Single-tuned passive harmonic filter"><div class="sym" style="font-size:10px;line-height:9px">─L─C─<br>HF</div>Passive Filter</button><button class="equip" data-type="activefilter" title="Active harmonic filter — controlled harmonic current compensation"><div class="sym" style="font-size:10px;line-height:9px">↯≋<br>AHF</div>Active Filter</button><button class="equip" data-type="spd" title="Low-voltage Surge Protective Device"><div class="sym" style="font-size:10px;line-height:10px">⚡<br><b>SPD</b></div>SPD</button>
<button class="equip" data-type="la" title="Medium-voltage Lightning / Surge Arrester"><div class="sym" style="font-size:10px;line-height:10px">⚡<br><b>LA</b></div>Lightning Arrester</button><button class="equip" data-type="load"><div class="sym">▽</div>Load</button><button class="equip" data-type="ups"><div class="sym">▣</div>UPS</button><button class="equip" data-type="ats"><div class="sym" style="font-size:11px;line-height:10px">IN1&nbsp; IN2<br>OUT</div>ATS</button><button class="equip" data-type="battery"><div class="sym">┃┊┃</div>Battery</button><button class="equip" data-type="ground" title="Place a grounding electrode and associate it with service equipment, an SDS source, or its first disconnect"><div class="sym">⏚</div>Ground Electrode</button><button class="equip" data-type="feeder"><div class="sym" style="font-size:12px;letter-spacing:-1px">─/\/\─∿∿─</div>Feeder</button><button class="equip" data-type="connection"><div class="sym" style="font-size:18px">●─</div>Connection</button><button class="equip" data-type="annotation" title="Place drawing note / callout; optional pointer arrow"><div class="sym" style="font-size:15px">T↗</div>Text / Callout</button><div class="librarySection"><span>DC ELEMENTS</span><span class="sectionTag">DC</span></div>
<button class="equip" data-type="dcsource" title="Pure DC source for DC Network Load Flow"><div class="sym"><svg viewBox="0 0 56 60" width="34" height="28" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="2" stroke-linecap="round" stroke-linejoin="round"><path d="M28 49 V58"/><circle cx="28" cy="30" r="19"/><path d="M20 24h8M24 20v8M34 24h8"/></g><text x="28" y="39" text-anchor="middle" font-size="8" font-weight="700" fill="currentColor">DC</text></svg></div>DC Source</button>
<button class="equip" data-type="dcbattery" title="Battery bank source for pure DC network"><div class="sym"><svg viewBox="0 0 56 60" width="34" height="28" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="2" stroke-linecap="round"><path d="M28 2v10M14 18h28M19 27h18M14 36h28M28 36v16"/></g><text x="8" y="15" font-size="9" font-weight="700" fill="currentColor">+</text><text x="43" y="15" font-size="9" font-weight="700" fill="currentColor">−</text><text x="28" y="57" text-anchor="middle" font-size="7" font-weight="700" fill="currentColor">D</text></svg></div>Battery Bank</button>
<button class="equip" data-type="dcrectifier" title="AC input to DC output charger / rectifier"><div class="sym"><svg viewBox="0 0 62 64" width="44" height="29" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="1.8" stroke-linecap="round" stroke-linejoin="round"><rect x="9" y="7" width="44" height="50"/><path d="M31 1v6M31 57v6"/><path d="M18 25q4-8 8 0t8 0"/><path d="M20 39h8m-4-4v8M35 39h8"/></g><text x="31" y="16" text-anchor="middle" font-size="6.5" font-weight="700" fill="currentColor">AC IN</text><text x="31" y="52" text-anchor="middle" font-size="6.5" font-weight="700" fill="currentColor">DC OUT</text></svg></div>Charger / Rectifier</button>
<button class="equip" data-type="dcbus" title="Dedicated DC bus"><div class="sym"><svg viewBox="0 0 58 34" width="46" height="27" aria-hidden="true"><g stroke="currentColor" stroke-width="3" stroke-linecap="round"><path d="M5 19h48"/></g><text x="29" y="10" text-anchor="middle" font-size="9" font-weight="700" fill="currentColor">D</text></svg></div>DC Bus</button>
<button class="equip" data-type="dcbreaker" title="DC-rated circuit breaker"><div class="sym"><svg viewBox="0 0 40 60" width="28" height="28" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="2" stroke-linecap="round" stroke-linejoin="round"><path d="M13 2 V23M13 37 V58M13 23 C19 23 20 27 20 30 C20 33 19 37 13 37"/></g><text x="30" y="33" text-anchor="middle" font-size="9" font-weight="700" fill="currentColor">D</text></svg></div>DC Breaker</button>
<button class="equip" data-type="dcfuse" title="DC fuse"><div class="sym"><svg viewBox="0 0 42 60" width="30" height="28" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="2"><path d="M15 2v17M15 41v17"/><rect x="9" y="19" width="12" height="22"/></g><text x="31" y="33" text-anchor="middle" font-size="9" font-weight="700" fill="currentColor">D</text></svg></div>DC Fuse</button>
<button class="equip" data-type="dcdisconnect" title="DC disconnect switch"><div class="sym"><svg viewBox="0 0 44 60" width="30" height="28" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="2" stroke-linecap="round"><path d="M14 2v18M14 40v18M14 20l13 15"/><circle cx="14" cy="20" r="2" fill="currentColor"/><circle cx="14" cy="40" r="2" fill="currentColor"/></g><text x="35" y="32" text-anchor="middle" font-size="9" font-weight="700" fill="currentColor">D</text></svg></div>DC Disconnect</button>
<button class="equip" data-type="dcpanel" title="DC distribution panel"><div class="sym"><svg viewBox="0 0 58 64" width="40" height="29" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="1.8"><path d="M29 1v6M29 57v6"/><rect x="7" y="7" width="44" height="50"/></g><text x="29" y="31" text-anchor="middle" font-size="9" font-weight="700" fill="currentColor">PNL</text><text x="29" y="43" text-anchor="middle" font-size="8" font-weight="700" fill="currentColor">D</text></svg></div>DC Panel</button>
<button class="equip" data-type="dcload" title="Pure DC load — DC Network Load Flow / Short Circuit"><div class="sym"><svg viewBox="0 0 52 60" width="34" height="28" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="2" stroke-linejoin="round"><path d="M26 2v12H10l16 32 16-32H26M26 46v12"/></g><text x="26" y="24" text-anchor="middle" font-size="8" font-weight="700" fill="currentColor">D</text></svg></div>DC Load</button>
<button class="equip" data-type="dcwire" title="Dedicated two-wire DC feeder"><div class="sym"><svg viewBox="0 0 58 40" width="46" height="27" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="1.8" stroke-linecap="round"><path d="M14 12h39M14 28h39"/></g><text x="5" y="15" font-size="10" font-weight="700" fill="currentColor">+</text><text x="5" y="31" font-size="10" font-weight="700" fill="currentColor">−</text></svg></div>DC Wire</button>
<button class="equip" data-type="dcdc" title="DC input to DC output converter"><div class="sym"><svg viewBox="0 0 62 64" width="44" height="29" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="1.8" stroke-linecap="round" stroke-linejoin="round"><rect x="9" y="7" width="44" height="50"/><path d="M31 1v6M31 57v6"/><path d="M17 31h28M39 26l6 5-6 5"/></g><text x="31" y="17" text-anchor="middle" font-size="6.5" font-weight="700" fill="currentColor">DC IN</text><text x="31" y="51" text-anchor="middle" font-size="6.5" font-weight="700" fill="currentColor">DC OUT</text></svg></div>DC-DC Converter</button>
<button class="equip" data-type="pvarray" title="PV array DC source with irradiance/temperature/curtailment model"><div class="sym"><svg viewBox="0 0 62 64" width="44" height="29" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="1.6"><rect x="13" y="12" width="36" height="26"/><path d="M25 12v26M37 12v26M13 25h36M31 38v15M23 53h16"/></g><text x="31" y="61" text-anchor="middle" font-size="7" font-weight="700" fill="currentColor">PV DC</text></svg></div>PV Array</button>
<button class="equip" data-type="dcinverter" title="DC input to AC output inverter — boundary element"><div class="sym"><svg viewBox="0 0 62 64" width="44" height="29" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="1.8" stroke-linecap="round" stroke-linejoin="round"><rect x="9" y="7" width="44" height="50"/><path d="M31 1v6M31 57v6"/><path d="M18 27h8m-4-4v8M35 27h8"/><path d="M18 41q4-7 8 0t8 0"/></g><text x="31" y="16" text-anchor="middle" font-size="6.5" font-weight="700" fill="currentColor">DC IN</text><text x="31" y="52" text-anchor="middle" font-size="6.5" font-weight="700" fill="currentColor">AC OUT</text></svg></div>Inverter</button>
<button class="equip" data-type="dcground" title="DC grounding / reference point"><div class="sym"><svg viewBox="0 0 50 60" width="34" height="28" aria-hidden="true"><g fill="none" stroke="currentColor" stroke-width="2" stroke-linecap="round"><path d="M25 2v25M10 27h30M15 35h20M20 43h10"/></g><text x="25" y="57" text-anchor="middle" font-size="8" font-weight="700" fill="currentColor">D</text></svg></div>DC Ground</button>
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<main class="canvas-wrap"><canvas id="canvas" class="canvas"></canvas><div class="hint">Professional canvas • Study results use consistent semantic colors</div><div id="faultBanner" class="faultBanner"></div><section id="systemTree" class="systemTree" aria-label="System Tree"><div class="treeHead"><span>SYSTEM TREE</span><button id="systemTreeClose" title="Hide System Tree">×</button></div><div class="treeSearch"><input id="systemTreeSearch" type="search" placeholder="Find ID, name, or type…" autocomplete="off"><button id="systemTreeClear" class="treeClearBtn" type="button" title="Clear search">×</button></div><div class="treeToolbar" aria-label="System Tree view"><button id="treeEquipmentView" class="treeViewBtn active" type="button" data-tree-view="equipment">BY EQUIPMENT</button><button id="treeTopologyView" class="treeViewBtn" type="button" data-tree-view="topology">BY SYSTEM</button></div><div id="systemTreeBody" class="treeBody"></div></section></main>
<aside class="panel right"><div class="ptitle">PROPERTIES</div><div id="props" class="props"><div style="font-size:10px;color:#666">Select an item to edit its properties.</div></div></aside>
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<div class="status"><span id="statusMode">Mode: Select</span><span id="statusZoom">Zoom: 100%</span><span id="statusXY">X: 0 Y: 0</span><span class="statusBrand">PowerFlowCheck Master 1.02 by Power Research &amp; Engineering LLC</span><span class="spacer"></span><span id="studyStatus">Study: None</span><span id="integrityStatus">Integrity: —</span><span id="statusSnap">Snap: Off</span><span id="statusGrid">Grid: Off</span></div>
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<!-- ULF_BUS_TERMINAL_POWER_2026: bus kW/kvar/kVA are receiving-end terminal power at load/pass-through buses and source-end terminal power at source buses; feeder losses remain on feeders, not shifted upstream onto the receiving bus. -->
<!-- PFC_UH_SCENARIO_HARDENING_20261001: UH scenario robustness: validates source-to-network/group mapping before phase injection; guards missing voltage/slack records and branch recovery; isolates malformed/disconnected harmonic sources as warnings instead of aborting the whole study; restores AHF runtime state with try/finally after UH errors. Solver equations for valid mapped elements are unchanged. -->
<!-- PFC_UH_MATRIX_FORENSIC_GUARD_20261001: Adds UH-only matrix profiling/checkpoints, finite-value validation, dense-matrix size guard, total-runtime budget, slow-solve logging, and AHF-loop runtime guard. Valid UH matrix equations and phasor results are unchanged below the guard thresholds. -->
<!-- PFC_UH_DEFECT_AUDIT_REINFORCEMENT_20261002: Surgical UH defect hardening after execution-path audit. Runs ULF/network preparation once per public UH run (reused across AHF iterations), adds topology preflight and execution counters, adds single-run re-entry guard, and preserves independent A/B/C/N equations. Prevents repeated LF/ULF/network rebuild + wrapper/render side effects during AHF control. -->

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<!-- Transformer Organization v56:
     Separate palette entries for Transformer 2W and Transformer 3W.
     Runtime shares the validated transformer solver while transformerClass is explicit.
     Project JSON exports transformer2w / transformer3w types and migrates legacy transformers on open.
     3W retains Zps/Zpt/Zst star-equivalent calculations and independent S/T voltage domains.
-->


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<!-- TIGHT_DATABLOCK_HUG_CB_UPS_ATS_VFD: actual text width + rotated symbol bounds; 2-unit input/common gap -->

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<!-- UPS_VFD_SHARED_LF_ARCHITECTURE_2026: UPS Normal mode uses the same AC converter coupling algorithm as VFD. -->

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<!-- PFC_SELF_CONTAINED_RELEASE_EVIDENCE_FIX_2026: controlled export embeds clean regression, frozen library manifest, and promotion record; reopened release no longer depends on browser localStorage. -->
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REGRESSION","note":"Release stability regression of sparse-solver routing only; explicitly not counted as independent numerical accuracy evidence.","rows":[{"caseId":"LF-013","quantity":"Auto routes scale case to sparse solver","calculated":"TRUE","expected":"TRUE","unit":"","tolerancePct":null,"toleranceAbs":null,"error":null,"errorPct":null,"status":"PASS","reference":"PERFORMANCE REGRESSION","note":"n=100"},{"caseId":"LF-013","quantity":"Solver plan is allowed","calculated":"TRUE","expected":"TRUE","unit":"","tolerancePct":null,"toleranceAbs":null,"error":null,"errorPct":null,"status":"PASS","reference":"PERFORMANCE REGRESSION","note":""}]},{"id":"LF-014","study":"Load Flow","name":"1,000 Bus","status":"PASS","gate":"PASS-R","source":"PERFORMANCE REGRESSION","note":"Release stability regression of sparse-solver routing only; explicitly not counted as independent numerical accuracy evidence.","rows":[{"caseId":"LF-014","quantity":"Auto routes scale case to sparse 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ANALYTICAL"},{"caseId":"ULF-001","quantity":"BUS-1 kW parity","calculated":100.54686162449738,"expected":100.54686162449738,"unit":"kW","tolerancePct":1e-08,"toleranceAbs":1e-08,"error":0,"errorPct":0,"status":"PASS","reference":"EXACT balanced bus-flow parity"}]},{"id":"ULF-002","study":"ULF","name":"Single-Phase A-N Current","status":"PASS","gate":"PASS","source":"ANALYTICAL","note":"Independent single-phase current oracle uses I=S/VLN with negligible benchmark feeder impedance.","rows":[{"caseId":"ULF-002","quantity":"ULF converged","calculated":"TRUE","expected":"TRUE","unit":"","tolerancePct":null,"toleranceAbs":null,"error":null,"errorPct":null,"status":"PASS","reference":"ENGINEERING / TOPOLOGY INVARIANT","note":""},{"caseId":"ULF-002","quantity":"A conductor current","calculated":99.97697402339625,"expected":99.92600812897369,"unit":"A","tolerancePct":0.1,"toleranceAbs":0.1,"error":0.05096589442256061,"errorPct":0.051003632964882716,"status":"PASS","reference":"INDEPENDENT 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INVARIANT","note":""},{"caseId":"ULF-005","quantity":"Source kW","calculated":100.00000012820958,"expected":100,"unit":"kW","tolerancePct":0.02,"toleranceAbs":0.03,"error":1.2820957806525257e-07,"errorPct":1.2820957806525257e-07,"status":"PASS","reference":"INDEPENDENT ANALYTICAL"},{"caseId":"ULF-005","quantity":"Net source kvar includes filter","calculated":15.000000128209514,"expected":14.999999999999972,"unit":"kvar","tolerancePct":0.05,"toleranceAbs":0.05,"error":1.2820954253811578e-07,"errorPct":8.547302835874402e-07,"status":"PASS","reference":"INDEPENDENT ANALYTICAL"},{"caseId":"ULF-005","quantity":"Filter reduces source kvar","calculated":"TRUE","expected":"TRUE","unit":"","tolerancePct":null,"toleranceAbs":null,"error":null,"errorPct":null,"status":"PASS","reference":"ENGINEERING / TOPOLOGY INVARIANT","note":"fromKvar=15.000000128209514"}]},{"id":"ULF-006","study":"ULF","name":"Bus Terminal Power Accounting","status":"PASS","gate":"PASS-C","source":"POWER-CONSERVATION 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identical-branch Z/2 result.","rows":[{"caseId":"SC-004","quantity":"Two identical transformer equivalent |Z1|","calculated":0.28750000000000003,"expected":0.28750000000000003,"unit":"pu","tolerancePct":1e-08,"toleranceAbs":1e-10,"error":0,"errorPct":0,"status":"PASS","reference":"INDEPENDENT ANALYTICAL"}]},{"id":"SC-005","study":"Short Circuit","name":"Generator Contribution","status":"PASS","gate":"PASS","source":"ANALYTICAL","note":"Production generatorSeqZpu is compared with an independently derived machine-base to study-base conversion.","rows":[{"caseId":"SC-005","quantity":"Generator Z1 Rpu","calculated":0.15,"expected":0.15,"unit":"pu","tolerancePct":1e-08,"toleranceAbs":1e-10,"error":0,"errorPct":0,"status":"PASS","reference":"INDEPENDENT ANALYTICAL"},{"caseId":"SC-005","quantity":"Generator Z1 Xpu","calculated":1.5,"expected":1.5,"unit":"pu","tolerancePct":1e-08,"toleranceAbs":1e-10,"error":0,"errorPct":0,"status":"PASS","reference":"INDEPENDENT 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Xdp remains fallback-only when locked-rotor data are absent.","rows":[{"caseId":"SC-006","quantity":"Motor Z1 Rpu","calculated":3.0382225714698743,"expected":3.0382225714698743,"unit":"pu","tolerancePct":1e-08,"toleranceAbs":1e-10,"error":0,"errorPct":0,"status":"PASS","reference":"INDEPENDENT ANALYTICAL"},{"caseId":"SC-006","quantity":"Motor Z1 Xpu","calculated":18.229335428819248,"expected":18.229335428819248,"unit":"pu","tolerancePct":1e-08,"toleranceAbs":1e-10,"error":0,"errorPct":0,"status":"PASS","reference":"INDEPENDENT ANALYTICAL"}]},{"id":"SC-007","study":"Short Circuit","name":"Line-to-Line Fault","status":"PASS","gate":"PASS","source":"ANALYTICAL","note":"Production faultFromSequenceZ LL result is compared to the independent symmetrical-component equation.","rows":[{"caseId":"SC-007","quantity":"LL fault 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rated-current \u00d7 multiplier equation.","rows":[{"caseId":"SC-016","quantity":"VFD output limited current","calculated":0.186,"expected":0.186,"unit":"kA","tolerancePct":1e-08,"toleranceAbs":1e-10,"error":0,"errorPct":0,"status":"PASS","reference":"INDEPENDENT ANALYTICAL"},{"caseId":"SC-016","quantity":"VFD method selection","calculated":"TRUE","expected":"TRUE","unit":"","tolerancePct":null,"toleranceAbs":null,"error":null,"errorPct":null,"status":"PASS","reference":"DEVICE ANALYTICAL","note":"Rated output current \u00d7 output fault multiplier"}]},{"id":"SC-017","study":"Short Circuit","name":"UPS Normal Mode","status":"PASS","gate":"PASS","source":"ANALYTICAL","note":"Production UPS inverter current-limit calculation is exercised against an independent three-phase rated-current equation.","rows":[{"caseId":"SC-017","quantity":"UPS inverter limited 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re-solve using exact MATPOWER r/x/b/tap/shift/shunt equations, separate from the PowerFlowCheck production solver.","rows":[{"caseId":"LF-IEEE-118","quantity":"Production LF converged","calculated":"TRUE","expected":"TRUE","unit":"","tolerancePct":null,"toleranceAbs":null,"error":null,"errorPct":null,"status":"PASS","reference":"ENGINEERING / TOPOLOGY INVARIANT","note":""},{"caseId":"LF-IEEE-118","quantity":"Maximum bus |\u0394V|","calculated":1.2527928694439083e-09,"expected":0,"unit":"pu","tolerancePct":0,"toleranceAbs":0.005,"error":1.2527928694439083e-09,"errorPct":null,"status":"PASS","reference":"Independent NR re-solve of published MATPOWER case"},{"caseId":"LF-IEEE-118","quantity":"Maximum bus |\u0394angle|","calculated":5.914666949990988e-06,"expected":0,"unit":"deg","tolerancePct":0,"toleranceAbs":1,"error":5.914666949990988e-06,"errorPct":null,"status":"PASS","reference":"Independent NR re-solve of published MATPOWER case"},{"caseId":"LF-IEEE-118","quantity":"Compared bus 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|\u0394V|","calculated":4.787129692651604e-09,"expected":0,"unit":"pu","tolerancePct":0,"toleranceAbs":0.005,"error":4.787129692651604e-09,"errorPct":null,"status":"PASS","reference":"Independent NR re-solve of published MATPOWER case"},{"caseId":"LF-IEEE-300","quantity":"Maximum bus |\u0394angle|","calculated":3.4694237012189433e-06,"expected":0,"unit":"deg","tolerancePct":0,"toleranceAbs":1,"error":3.4694237012189433e-06,"errorPct":null,"status":"PASS","reference":"Independent NR re-solve of published MATPOWER case"},{"caseId":"LF-IEEE-300","quantity":"Compared bus count","calculated":300,"expected":300,"unit":"buses","tolerancePct":0,"toleranceAbs":0,"error":0,"errorPct":0,"status":"PASS","reference":"IEEE/MATPOWER published case"}]},{"id":"MS-SUITE","study":"Motor Starting","name":"Motor-start analytical/dynamic validation suite","status":"PASS","gate":"PASS","source":"IEEE 3002.7-2018 methodology + industry reduced-voltage starter reference factors","note":"15 checks"},{"id":"CON-SUITE","study":"Conduit","name":"Conduit fill / dimensional suite","status":"PASS","gate":"PASS*","source":"Controlled NEC rule + dimensional table benchmarks","note":"6/6 checks"},{"id":"GND-SUITE","study":"Grounding","name":"Grounding & bonding deterministic suite","status":"PASS","gate":"PASS*","source":"Controlled NEC Article 250 benchmark set","note":"5/5 checks; adopted edition must be recorded"},{"id":"EQ-DECISION-SUITE","study":"Equipment Evaluation","name":"Equipment Evaluation decision-boundary suite","status":"PASS","gate":"PASS-C","source":"Independent arithmetic / boundary invariants","note":"25/25 checks","rows":[{"id":"EQ-CONT-001","ok":true,"note":"3000 A / 2999 A -> PASS"},{"id":"EQ-CONT-002","ok":true,"note":"3000 A / 3000 A -> PASS"},{"id":"EQ-CONT-003","ok":true,"note":"3000 A / 3001 A -> FAIL"},{"id":"EQ-FAULT-001","ok":true,"note":"65 kA / 64.9 kA -> PASS"},{"id":"EQ-FAULT-002","ok":true,"note":"65 kA / 65.0 kA -> PASS"},{"id":"EQ-FAULT-003","ok":true,"note":"65 kA / 65.1 kA -> FAIL"},{"id":"EQ-DATA-001","ok":true,"note":"Missing required rating -> DATA REQUIRED"},{"id":"EQ-UTIL-001","ok":true,"note":"Utilization = duty/rating \u00d7100"},{"id":"EQ-MARGIN-001","ok":true,"note":"Continuous margin arithmetic"},{"id":"EQ-MARGIN-002","ok":true,"note":"Fault margin arithmetic"},{"id":"EQ-BOUND-001","ok":true,"note":"399 vs 400 -> PASS"},{"id":"EQ-BOUND-002","ok":true,"note":"400 vs 400 -> PASS"},{"id":"EQ-BOUND-003","ok":true,"note":"401 vs 400 -> FAIL"},{"id":"EQ-BOUND-004","ok":true,"note":"21.9 vs 22 -> PASS"},{"id":"EQ-BOUND-005","ok":true,"note":"22 vs 22 -> PASS"},{"id":"EQ-BOUND-006","ok":true,"note":"22.1 vs 22 -> FAIL"},{"id":"EQ-BOUND-007","ok":true,"note":"1199.999 vs 1200 -> PASS"},{"id":"EQ-BOUND-008","ok":true,"note":"1200 vs 1200 -> PASS"},{"id":"EQ-BOUND-009","ok":true,"note":"1200.001 vs 1200 -> FAIL"},{"id":"EQ-BOUND-010","ok":true,"note":"49.99 vs 50 -> PASS"},{"id":"EQ-BOUND-011","ok":true,"note":"50 vs 50 -> PASS"},{"id":"EQ-BOUND-012","ok":true,"note":"50.01 vs 50 -> FAIL"},{"id":"EQ-BOUND-013","ok":true,"note":"0 vs 400 -> PASS"},{"id":"EQ-BOUND-014","ok":true,"note":"1 vs 1 -> PASS"},{"id":"EQ-BOUND-015","ok":true,"note":"1.000001 vs 1 -> FAIL"}]},{"id":"VOLTAGE-SUITE","study":"Voltage Check","name":"Voltage-class topology and mismatch suite","status":"PASS","gate":"PASS-C","source":"Topology / nominal-voltage invariants","note":"15/15 checks","rows":[{"id":"VC-001","ok":true,"note":"480 V domain has one common voltage class"},{"id":"VC-002","ok":true,"note":"All same-voltage feeders classify OK"},{"id":"VC-003","ok":true,"note":"2W transformer is multi-voltage"},{"id":"VC-004","ok":true,"note":"Primary feeder is 13.8 kV class"},{"id":"VC-005","ok":true,"note":"Secondary feeder is 480 V class"},{"id":"VC-006","ok":true,"note":"Direct 13.8 kV-to-480 V feeder -> MISMATCH"},{"id":"VC-007","ok":true,"note":"Missing nominal voltage -> DATA REQUIRED"},{"id":"VC-008","ok":true,"note":"UPS with different input/output voltages -> MULTI-VOLTAGE"},{"id":"VC-009","ok":true,"note":"VFD with equal input/output voltage has single class"},{"id":"VC-010","ok":true,"note":"Present voltage class gets a color"},{"id":"VC-011","ok":true,"note":"Legend lists only present class"},{"id":"VC-012","ok":true,"note":"No false mismatch count"},{"id":"VC-013","ok":true,"note":"Exact equal voltage mismatch = 0%"},{"id":"VC-014","ok":true,"note":"Large cross-class mismatch exceeds criterion"},{"id":"VC-015","ok":true,"note":"Sub-kV legend formatting is readable"}]},{"id":"ASSEMBLY-SUITE","study":"Equipment Evaluation","name":"Integral bus / assembly reconciliation suite","status":"PASS","gate":"PASS-C","source":"Assembly-model invariants","note":"8/8 checks","rows":[{"id":"AR-001","ok":true,"note":"Legacy equipment continuous rating migrates to rated auto bus"},{"id":"AR-002","ok":true,"note":"Legacy equipment SCCR migrates to rated auto-bus withstand"},{"id":"AR-003","ok":true,"note":"Load-only panel no longer owns continuous/SCCR ratings"},{"id":"AR-004","ok":true,"note":"Bus ratings remain authoritative and are not copied back to load-only equipment"},{"id":"AR-005","ok":true,"note":"Auto-named bus follows equipment rename"},{"id":"AR-006","ok":true,"note":"Manual rated-bus name is preserved"},{"id":"AR-007","ok":true,"note":"Rated automatic bus is included in dedicated duty-bus set"},{"id":"AR-008","ok":true,"note":"Equipment Evaluation evaluates the bus rather than the load-only panel"}]},{"id":"AUTOSIZE-BOUNDARY-SUITE","study":"Auto Size","name":"Auto Size design-factor boundary suite","status":"PASS","gate":"PASS-C","source":"Independent arithmetic / design-basis invariants","note":"6/6 checks","rows":[{"id":"AS-001","ok":true,"note":"Default factors = 1.0 \u00d7 1.00 \u00d7 1.00"},{"id":"AS-002","ok":true,"note":"2254 A remains 2254 A at defaults"},{"id":"AS-003","ok":true,"note":"20% growth = 1.20"},{"id":"AS-004","ok":true,"note":"10% spare = 1.10"},{"id":"AS-005","ok":true,"note":"Load factor remains direct multiplier"},{"id":"AS-006","ok":true,"note":"Combined design-current arithmetic"}]},{"id":"ULF-CURRENT-BASIS-SUITE","study":"Equipment Evaluation / Auto Size","name":"ULF governing-phase current-basis suite","status":"PASS","gate":"PASS-C","source":"Independent phase-current selection / freshness invariants","note":"4/4 checks","rows":[{"id":"ULF-CB-001","ok":true,"note":"Max phase selection: B = 428 A governs"},{"id":"ULF-CB-002","ok":true,"note":"Equipment Evaluation Auto prefers current ULF max phase"},{"id":"ULF-CB-003","ok":true,"note":"Auto Size Auto prefers current ULF max phase"},{"id":"ULF-CB-004","ok":true,"note":"Stale ULF revision falls back to Balanced LF in Auto"}]},{"id":"SINGLE-PHASE-ULF-SUITE","study":"ULF","name":"Single-phase ULF conductor-current suite","status":"PASS","gate":"PASS-C","source":"Independent 1\u03a6 L-N / L-L current-injection and neutral-current invariants","note":"7/7 checks","rows":[{"id":"SP-ULF-001","ok":true,"note":"12 kVA A-N at 120 V gives 100 A on A only"},{"id":"SP-ULF-002","ok":true,"note":"A-B line-line injection is equal/opposite with zero neutral contribution"},{"id":"SP-ULF-003","ok":true,"note":"Equal A/B/C single-phase L-N loads cancel neutral current"},{"id":"SP-ULF-004","ok":true,"note":"Single A-N load returns 100 A neutral current under zero-neutral-impedance assumption"},{"id":"SP-MS-001","ok":true,"note":"Single-phase motor FLA uses L-N connection voltage"},{"id":"SP-MS-002","ok":true,"note":"Single-phase line-line motor FLA uses L-L connection voltage"},{"id":"SP-REG-001","ok":true,"note":"Existing 3\u03a6 motor FLA formula unchanged"}]},{"id":"SINGLE-PHASE-MS-SUITE","study":"Motor Starting","name":"Single-phase motor starting basis suite","status":"PASS","gate":"PASS-C","source":"Internal 1\u03a6 motor-current / 3\u03a6-regression invariants; external dynamic benchmark still required","note":"3/3 checks; internal equivalent-circuit invariants supplemented by SINGLE-PHASE-MS-INDEPENDENT","rows":[{"id":"SP-MS-001","ok":true,"note":"Single-phase motor FLA uses L-N connection voltage"},{"id":"SP-MS-002","ok":true,"note":"Single-phase line-line motor FLA uses L-L connection voltage"},{"id":"SP-REG-001","ok":true,"note":"Existing 3\u03a6 motor FLA formula unchanged"}]},{"id":"REL-A01","study":"Reliability","name":"Single radial path exact series availability","status":"PASS","gate":"PASS","source":"Independent analytical probability reference","note":"Apath = product of component steady-state availabilities; error=0.000e+0","actual":0.9996713024836582,"expected":0.9996713024836582,"tolerance":2e-10},{"id":"REL-A02","study":"Reliability","name":"Two independent source paths exact parallel availability","status":"PASS","gate":"PASS","source":"Independent analytical probability reference","note":"Asystem = 1-(1-Apath1)(1-Apath2); error=0.000e+0","actual":0.9999999798322592,"expected":0.9999999798322592,"tolerance":2e-10},{"id":"REL-A03","study":"Reliability","name":"Shared upstream component with two redundant branches","status":"PASS","gate":"PASS","source":"Independent analytical probability reference","note":"Acommon \u00d7 [1-(1-Apath1)(1-Apath2)]; error=2.220e-16","actual":0.9998082262448805,"expected":0.9998082262448803,"tolerance":3e-09},{"id":"LF-DISP-001","study":"Load Flow","name":"Bus voltage / voltage-drop display identity","status":"PASS","gate":"PASS","source":"Independent analytical post-processing identity","note":"Fixed case: Vnom=480 V, Vsolved=467 V; expected 467 V, 0.9729167 pu, \u0394V=2.708333%. Solver state is not modified."},{"id":"HAR-DISP-001","study":"Harmonics","name":"Independent THDv / THDi / TDD bus display fields","status":"PASS","gate":"PASS","source":"Independent display post-processing identity","note":"Fixed stored result: THDv=2.4%, THDi=18.3%, TDD=6.1%; each quantity must remain independently labeled."},{"id":"HAR-DISP-002","study":"Harmonics","name":"TDD one-line display restricted to designated PCC bus","status":"PASS","gate":"PASS","source":"Independent presentation-rule regression","note":"The same stored TDD screening value is displayed on an explicit PCC and suppressed on an internal non-PCC bus; harmonic solver data are unchanged."},{"id":"ULF-PF-DIR-001","study":"ULF","name":"Reverse-flow feeder PF direction normalization","status":"PASS","gate":"PASS","source":"Independent terminal-power sign-convention regression","note":"A feeder drawn opposite solved lagging power flow must reverse terminal orientation before LEAD/LAG classification; expected to-from, positive flow-oriented kW/kvar and LAG."},{"id":"HAR-BUS-RMS-001","study":"Harmonics","name":"Bus harmonic RMS KCL reconciliation","status":"PASS","gate":"PASS","source":"Independent complex-current boundary regression","note":"When an upstream bus-region record is zero but two downstream H5 currents are 12 A and 8 A in phase, the bus resultant must reconcile to 20 A harmonic RMS rather than 0 A."},{"id":"HAR-BUS-001","study":"Harmonics","name":"Single nonlinear load \u2014 bus current equals supplying feeder current","status":"PASS","gate":"PASS","source":"Permanent HAR-BUS analytical regression","note":"Expected 20 A H5 resultant."},{"id":"HAR-BUS-002","study":"Harmonics","name":"Two downstream feeders \u2014 upstream bus phasor aggregation","status":"PASS","gate":"PASS","source":"Permanent HAR-BUS analytical regression","note":"20 A + 30 A in phase = 50 A."},{"id":"HAR-BUS-003","study":"Harmonics","name":"Multi-level radial upstream accumulation","status":"PASS","gate":"PASS","source":"Permanent HAR-BUS analytical regression","note":"50 A downstream region + 10 A branch = 60 A upstream."},{"id":"HAR-BUS-004","study":"Harmonics","name":"Open breaker removes disconnected branch","status":"PASS","gate":"PASS","source":"Permanent HAR-BUS analytical regression","note":"Open branch is omitted from energized topology; remaining branch is 20 A."},{"id":"HAR-BUS-005","study":"Harmonics","name":"Out-of-service load removed from bus current","status":"PASS","gate":"PASS","source":"Permanent HAR-BUS analytical regression","note":"Out-of-service contribution is omitted from harmonicSourceObjects/buildNetworks."},{"id":"HAR-BUS-006","study":"Harmonics","name":"Transformer harmonic propagation","status":"PASS","gate":"PASS","source":"Permanent HAR-BUS analytical regression","note":"Production transformer rule blocks triplen zero-sequence across Delta while permitting non-triplen sequence transfer; registered HAR-006 performs the numerical network benchmark."},{"id":"HAR-BUS-007","study":"Harmonics","name":"Passive filter modifies source current while KCL remains satisfied","status":"PASS","gate":"PASS","source":"Permanent HAR-BUS analytical regression","note":"30 A load and 10 A opposing tuned-filter current yield 20 A source-side H5."},{"id":"HAR-BUS-008","study":"Harmonics","name":"Capacitor resonance case","status":"PASS","gate":"PASS","source":"Permanent HAR-BUS analytical regression","note":"Permanent HAR-005 analytical resonance benchmark remains registered and callable in the same full regression."},{"id":"HAR-BUS-009","study":"Harmonics","name":"Bus harmonic RMS calculation","status":"PASS","gate":"PASS","source":"Permanent HAR-BUS analytical regression","note":"sqrt(50^2+15^2)."},{"id":"HAR-BUS-010","study":"Harmonics","name":"Bus total RMS calculation","status":"PASS","gate":"PASS","source":"Permanent HAR-BUS analytical regression","note":"sqrt(I1^2+Ih,rms^2)."},{"id":"HAR-BUS-011","study":"Harmonics","name":"Save/Open reproducibility of harmonic current fields","status":"PASS","gate":"PASS","source":"Permanent HAR-BUS analytical regression","note":"JSON persistence preserves bus current fields."},{"id":"HAR-BUS-012","study":"Harmonics","name":"Repeated execution stability","status":"PASS","gate":"PASS","source":"Permanent HAR-BUS analytical regression","note":"20 identical aggregations return 20 A without accumulation."},{"id":"HAR-BUS-013","study":"Harmonics","name":"One-line/table/report current-field consistency contract","status":"PASS","gate":"PASS","source":"Permanent HAR-BUS analytical regression","note":"Common stored bus fields and formatter are available to every surface."},{"id":"HAR-BUS-014","study":"Harmonics","name":"Bus KCL residual per harmonic","status":"PASS","gate":"PASS","source":"Permanent HAR-BUS analytical regression","note":"Exact YV=I case produces zero complex residual."},{"id":"HAR-BUS-015","study":"Harmonics","name":"Zero fundamental current / THDi denominator protection","status":"PASS","gate":"PASS","source":"Permanent HAR-BUS analytical regression","note":"Non-zero harmonic current with I1\u22480 must not display 0% THDi."},{"id":"HAR-LF-PARITY-001","study":"Harmonics","name":"No-harmonic LF/RMS parity","status":"PASS","gate":"PASS","source":"Fundamental-current identity regression","note":"With no harmonic orders present, the harmonic study bus I1 and total RMS must equal the authoritative fresh LF bus current exactly."},{"id":"CORE-PLATFORM-SUITE","study":"Core","name":"Positive Core Platform release suite","status":"PASS","gate":"PASS-C","source":"Internal release-control invariants","note":"8/8 checks; internal independent reference, not third-party certification","rows":[{"id":"CORE-001","ok":true,"note":"Canvas and Save/Open controls are present."},{"id":"CORE-002","ok":true,"note":"Core draw/property/invalidation functions are callable."},{"id":"CORE-003","ok":true,"note":"Object/feeder display and movable-text hit engine are present."},{"id":"CORE-004","ok":true,"note":"Report selection and report builder are callable."},{"id":"CORE-005","ok":true,"note":"Distribution schedule engine is callable."},{"id":"CORE-006","ok":true,"note":"Runtime release identity matches the current PowerFlowCheck 1.02 edition and release ID."},{"id":"CORE-007","ok":true,"note":"Release artifact/hash utilities are callable."},{"id":"CORE-008","ok":true,"note":"Regression and Master Gate functions are callable."}]},{"id":"ULF-NUMERICAL-SUITE","study":"ULF","name":"Independent ULF numerical reference suite","status":"PASS","gate":"PASS-C","source":"Independent internal analytical references","note":"6/6 checks; internal independent reference, not third-party certification","rows":[{"id":"ULF-NUM-001","ok":true,"note":"12 kVA A-N conductor-current identity","actual":99.92600812897369,"expected":99.92600812897369,"tolerance":"1e-8 A"},{"id":"ULF-NUM-002","ok":true,"note":"20 kVA A-B uses Vab and equal/opposite conductor currents","actual":96.15384615384616,"expected":96.15384615384616,"tolerance":"1e-8 A"},{"id":"ULF-NUM-003","ok":true,"note":"Equal single-phase A/B/C loads cancel neutral current","actual":2.842170943040401e-14,"expected":0,"tolerance":"1e-8 A"},{"id":"ULF-NUM-004","ok":true,"note":"Balanced 3\u03a6 load divides equally among phases","actual":24.981502032243423,"expected":24.981502032243423,"tolerance":"1e-8 A"},{"id":"ULF-NUM-005","ok":true,"note":"Single-branch complex voltage-drop arithmetic","actual":119.10564899008966,"expected":119.10564899008966,"tolerance":"1e-10 V"},{"id":"ULF-NUM-006","ok":true,"note":"Resistive/reactive branch produces positive magnitude drop for lagging-direction test current","actual":0.983207001352497,"expected":">0","tolerance":"positive"}]},{"id":"SCHEDULE-ULF-SUITE","study":"ULF","name":"Schedule to ULF numerical phase-mapping suite","status":"PASS","gate":"PASS-C","source":"Independent internal schedule/phasor references","note":"2/2 checks; internal independent reference, not third-party certification","rows":[{"id":"SCHED-ULF-001","ok":true,"note":"Schedule phase powers map independently to A/B/C","actual":"10/5/2","expected":"10/5/2 kW"},{"id":"SCHED-ULF-002","ok":true,"note":"Schedule current injection uses phase-to-neutral voltage by row","actual":"83.2716734408114/41.635836720405706/16.654334688162283","expected":"83.27167344081141/41.635836720405706/16.654334688162283"}]},{"id":"DC-UPS-SUITE","study":"DC / UPS","name":"DC / UPS analytical validation suite","status":"PASS","gate":"PASS-C","source":"Independent internal energy/current/voltage-drop references","note":"5/5 checks; internal independent reference, not third-party certification","rows":[{"id":"DC-001","ok":true,"note":"Battery available-energy identity","actual":36.480000000000004,"expected":36.480000000000004},{"id":"DC-002","ok":true,"note":"Copper DC resistance temperature correction","actual":0.03137667,"expected":0.03137667},{"id":"DC-003","ok":true,"note":"UPS battery-mode current reference: Pdc=Pout/\u03b7 and I=Pdc/V","actual":109.64912280701756,"expected":109.649122807},{"id":"DC-004","ok":true,"note":"DC two-conductor loop voltage-drop identity","actual":0.3440424342105264,"expected":0.3440424342105264},{"id":"DC-005","ok":true,"note":"Runtime energy/power identity","actual":41.5872,"expected":41.5872}]},{"id":"UPS-DC-INTEGRATION-SUITE","study":"DC / UPS","name":"UPS to DC integration suite","status":"PASS","gate":"PASS-C","source":"Synthetic topology + independent DC reference","note":"2/2 checks; internal independent reference, not third-party certification","rows":[{"id":"UPS-DC-001","ok":true,"note":"UPS Battery mode hands AC output demand to DC link through inverter efficiency","actual":"10/20.833333333333332","expected":"10/20.833333333333332"},{"id":"UPS-DC-002","ok":true,"note":"Connected battery energy produces finite positive runtime","actual":218.88000000000002,"expected":">0"}]},{"id":"GEN-SIZING-SUITE","study":"Generator Sizing","name":"Generator sizing validation suite","status":"PASS","gate":"PASS-C","source":"Existing analytical/dynamic validation suite wired to Master Gate","note":"11/11 checks; internal independent reference, not third-party certification","rows":[{"id":"GEN-001","ok":true,"note":"kVA identity","actual":125,"expected":125},{"id":"GEN-002","ok":true,"note":"Growth + reserve kW","actual":132,"expected":132},{"id":"GEN-003","ok":true,"note":"Candidate kVA at 0.8 PF","actual":250,"expected":250},{"id":"GEN-004","ok":true,"note":"Xd'' short-circuit conversion","actual":1.994739547296619,"expected":1.994739547296619},{"id":"GEN-005","ok":true,"note":"Dynamic motor timestep convergence","actual":1,"expected":1},{"id":"GEN-006","ok":true,"note":"Zero load-step frequency invariance","actual":0,"expected":0},{"id":"GEN-007","ok":true,"note":"Larger step produces larger frequency dip","actual":1,"expected":1},{"id":"GEN-008","ok":true,"note":"Higher inertia reduces initial frequency dip","actual":1,"expected":1},{"id":"GEN-009","ok":true,"note":"Star-delta source kVA reduction","actual":0.3333333333333333,"expected":0.3333333333333333},{"id":"GEN-010","ok":true,"note":"Autotransformer 65% source kVA reduction","actual":0.42250000000000004,"expected":0.4225},{"id":"GEN-011","ok":true,"note":"Reduced-voltage source current is lower than ATL","actual":1,"expected":1}]},{"id":"MS-GEN-INTEGRATION-SUITE","study":"Generator Sizing","name":"Motor Start to Generator Sizing integration suite","status":"PASS","gate":"PASS-C","source":"Independent starter-factor + production dynamic comparison","note":"2/2 checks; internal independent reference, not third-party certification","rows":[{"id":"MS-GEN-001","ok":true,"note":"Generator-side motor-start current responds to starter strategy","actual":286.8132616064069,"expected":"< 629.6359149526431"},{"id":"MS-GEN-002","ok":true,"note":"Generator starting-kVA reduction factor for 65% autotransformer","actual":0.42250000000000004,"expected":0.4225}]},{"id":"SINGLE-PHASE-MS-INDEPENDENT","study":"Motor Starting","name":"Single-phase motor-start independent reference suite","status":"PASS","gate":"PASS-C","source":"Independent locked-rotor Thevenin/voltage-divider reference","note":"2/2 checks; internal independent reference, not third-party certification","rows":[{"id":"SP-MS-EXT-001","ok":true,"note":"Independent 1\u03a6 locked-rotor Thevenin current reference","actual":48.74971204054207,"expected":48.74971204054207},{"id":"SP-MS-EXT-002","ok":true,"note":"Independent 1\u03a6 locked-rotor voltage-divider reference","actual":0.9757161914768218,"expected":0.9757161914768218}]},{"id":"LFSC-HAR-INTEGRATION-SUITE","study":"Harmonics","name":"LF/SC to Harmonics numerical coupling suite","status":"PASS","gate":"PASS-C","source":"Independent source-impedance and fundamental-current references","note":"2/2 checks; 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<!-- PFC_AHF_DESIGN_CALCULATOR_SCOPE_PHASOR_STEADY_HEIGHT_FIX_20261002:
Repairs Design Calculators AHF estimator private-scope defect by embedding the native built-in harmonic profile spectra in the estimator; profile selections now resolve to actual spectra. Fundamental and harmonic currents are phasor-aggregated at the common sensing bus, target THDi sizing is rechecked, load rows can be added/removed, and regression includes native-profile and denominator checks. QuickCalc captures its opening height and preserves that exact height/position across tab changes unless the user drags the window or the viewport becomes smaller. Existing LF/ULF/SC/H/UH/DC solver equations are unchanged. -->
<!-- PFC_DESIGN_CALCULATORS_REGRESSION_HARDENING_20261002:
Regression hardening for Design Calculators. Fixes passive-filter capacitor kvar relation, preserves leading/lagging PF after standard capacitor/filter selection, blocks false PASS on missing conductor impedance, adds achieved-PF/status checks, and embeds deterministic calculator regression tests. Existing LF/ULF/SC/H/UH/DC solver equations are unchanged. -->
<!-- PFC_DESIGN_CALCULATORS_VD_PF_FILTER_AHF_20261002:
Adds a dedicated Design Calculators tab to QuickCalc with independent 1Φ/3Φ voltage-drop, PF-capacitor, passive single-tuned filter/PF, and AHF harmonic-profile aggregation estimators. Existing LF/ULF/SC/H/UH/DC solver equations are unchanged. -->
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Voltage-drop calculator is self-contained outside the native application closure and uses an embedded copy of the same PowerFlowCheck NEC Table 9 R/X data. Removes inaccessible private-scope dependencies that caused zero/DATA REQUIRED results. Adds explicit DATA REQUIRED behavior, live recalculation, integrated Table-9 regression checks, and preserves the stable QuickCalc modal/tab position. Existing LF/ULF/SC/H/UH/DC solver equations are unchanged. -->
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QuickCalc modal remains at a fixed viewport position and fixed height while switching among Conductor Sizing, LV Ampacity, MV Ampacity, Equipment Sizing, and Design Calculators. User drag remains authoritative; tab changes never recenter the popup. Other modal dialogs retain native behavior. -->
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